Forums Search for: STLM
latency between STLM and MVDK
inHi all, The Cpu&Peripherals book says that there are some restricitons using STLM when writing to an AR. One of these is that* ...
Hi all, The Cpu&Peripherals book says that there are some restricitons using STLM when writing to an AR. One of these is that* "the next instruction must write to any ARx..." Then why do I have STLM A, AR2 MVDK *sp(db),AR4 i
How to prevent interrupts following a STLM instruction
Hi, I'm porting C54 code on C55 simulator and below is an example of where I'm having pbs. XC #2, UNC ; prevent interrupt...
Hi, I'm porting C54 code on C55 simulator and below is an example of where I'm having pbs. XC #2, UNC ; prevent interrupt following STLM STLM A, SP SSBX SXM The above code (XC instr)causes the C55 simulator to crash. Can somebody please tell me how to