let say i have a 5Mhz band @ 7.68MSPS and I have to filter out a channel of 20Khz and at the same time the group delay of my filter system (DDC + Channel Filter + DUC) must be less than 6us. 

Is their a way to design a channel filter with such specs?

Thanks in Advance.

This sounds dubious to me.  One cycle at 20 KHz is already 50 us.  Where is the 20 KHz band?  If centered on 2.5 MHz, then the "Q" of the band is Q = 2.5e6/20e3 = 125, which has an inherent "ring time" of around 125 periods at 2.5 MHz, which is again 50 us.

I am not familiar with "MSPS" units.  It can't be "mega-samples-per-second" because then 5 MHz would be undersampled.

I suggest trying out some designs in Matlab:

https://www.mathworks.com/discovery/filter-design....

Working with that software both teaches you what a complete filter specification looks like, and what the limitations are. 

The 7.68 msps is standard lte sampling rate for lte5 which is 2.4MHz but nominally 5MHz complex. Assuming I am right then the 20KHz is outside band of interest and needs be removed so delay is relevant to filter needed. 

Ok, that makes sense.  To answer the question, we need to know the pass-band and stop-band edge frequencies for the desired isolation filter.  A 6us delay spec needs a transition bandwidth on the order of 1/6us = 167 KHz.  Thus, the undesired 20KHz band needs to be something like 200+ KHz away from the desired pass-band.  There is no way around this due to basic Fourier theory.

HI, thanks for the response. 

I think i don't sound clear in my explanation, sorry for that.

Actually I want to extract a 20 kHz channel from a band of 5 MHz (which is at baseband). For this I have to design  a LOW PASS FIR FILTER in FPGA.

Spectral mask SPecs are,  signal will have signals at the same level as the main carrier frequency at +/-10 kHz from the centre frequency but must be -60 dBc at 25 kHz. In addition it must be -70 dBc at +/- 50 kHz and between -80 dBc and -100 dBc at +/-100 kHz

I am getting this data of 5 MHz at 7.68 MHz sampling rate . So I am Decimating it further and then passing it through a Low Pass FIR filter. But designing such a sharp filter at a adequately fine sampling rate (decimated from 7.68MHz) will give a filter with Group delay in milliseconds. so i wanted to know if there is a way to reduce group delay of filter with such specs.

Thanks.

Basically, bandwidth vs. group delay is kind of like the laws of thermodynamics: you can't win, you can't break even, and you can't even get out of the game.

More or less, all things being equal, the group delay is going to be inversely proportional to the width of the transition band, and moreover it's going to have a constant of proportionality of greater than 1.

If you can give us details, there may be some dodges that can be applied to your specific case (if, for instance, you have a strong interfering tone that is nice and steady and that doesn't have important signal information in the spectrum around it -- then all the group delay can be concentrated around the tone's frequency, as in the notch that kaz suggested).

HI, thanks for the response. 

I think i don't sound clear in my explanation, sorry for that.

Actually I want to extract a 20 kHz channel from a band of 5 MHz (which is at baseband). For this I have to design  a LOW PASS FIR FILTER in FPGA.

Spectral mask SPecs are,  signal will have signals at the same level as the main carrier frequency at +/-10 kHz from the centre frequency but must be -60 dBc at 25 kHz. In addition it must be -70 dBc at +/- 50 kHz and between -80 dBc and -100 dBc at +/-100 kHz

I am getting this data of 5 MHz at 7.68 MHz sampling rate . So I am Decimating it further and then passing it through a Low Pass FIR filter. But designing such a sharp filter at a adequately fine sampling rate (decimated from 7.68MHz) will give a filter with Group delay in milliseconds. so i wanted to know if there is a way to reduce group delay of filter with such specs.

Thanks.

You can use a notch IIR filter. Sounds you want to remove lte antenna test tone.

As to DDC/DUC delay that is a separate issue. 

HI, thanks for the response. 

I think i don't sound clear in my explanation, sorry for that.

Actually I want to extract a 20 kHz channel from a band of 5 MHz (which is at baseband). For this I have to design  a LOW PASS FIR FILTER in FPGA.

Spectral mask SPecs are,  signal will have signals at the same level as the main carrier frequency at +/-10 kHz from the centre frequency but must be -60 dBc at 25 kHz. In addition it must be -70 dBc at +/- 50 kHz and between -80 dBc and -100 dBc at +/-100 kHz

I am getting this data of 5 MHz at 7.68 MHz sampling rate . So I am Decimating it further and then passing it through a Low Pass FIR filter. But designing such a sharp filter at a adequately fine sampling rate (decimated from 7.68MHz) will give a filter with Group delay in milliseconds. so i wanted to know if there is a way to reduce group delay of filter with such specs.

Thanks.

Hello,

I'm not sure about group delay, it may be that because of the tight filtering requirement the delay may be high.

But I would approach this problem from a multi-rate perspective.  It usually isn't very efficient to tightly filter a signal at a high sampling rate.  If you can do a series of Fs/4 rotations (practically free) followed by half-band decimating filters (or 1/3, 1/4, etc., even CIC in a pinch) you can make the problem much easier.  Fred Harris would tend to roll the down conversion into the same polyphase filter taps that also did the filtering but that is an exercise for the reader...

Anyway, it may be that the lower order filter at the lower sampling rate may have a lower total group delay than one at the higher sampling rate.

Another option if you have multiple signals like this to pull out is to make a channelizer.

Best regards,

Mark Napier

With decimation more filters are needed and so more delay.

I am not sure I understand the case raised originally:

signal bandwidth is 5MHz, sampling rate is 7.68Msps ??? wrong sampling then.

what is in this signal bandwidth and how and where the 20KHz fits?

What is the final sampling rate required?

If decimation is needed there would be more filters and more delay unless good multirate cascade or one good filter is used at high rate but then it requires relatively more taps.

Hello,

The way I read it is a 5MHz BW at baseband so +- 2.5MHz complex at 7.68Msps.  Seems reasonable.

Anyway, the problem as stated is to have the DDC + filtering + DUC group delay be 6us while tightly filtering a narrowband signal.  I don't think this is possible but was spit-balling how to get close.

You are right, a normal multi-rate cascade is going to be slow.  I was thinking CICs maybe for the down and up for simplicity and filter at the lower rate for efficiency.  May not do anything for total group delay.

Another way would be a polyphase filter that combines the decimation and filtering functions.  Not exactly pretty to design and implement but very, very efficient and has minimal delay.

That's about all I can think of off hand w/o doing it myself.

Cheers,

Mark Napier

Ok but where is the 20KHz in relation to the user signal. I mean there must be user signal to pass through the filter and the filter is meant to get rid of 20KHz is just an extra task. How far is 20KHs from user signal edge, or is it inside useful signal area? That is not clear.

The user signal also will define downsampling filters.

Agreed.

actually 5mhz is at baseband and it is made up of 20khz FDM channels. task is to simply extract this 20khz channel amplify it and transmit.

with minimum possible group delay.

or what could be the minimum possibe GD of such  system?

FDM channel(s) or channel??

sounds tough to me. what is your sample rate for this 5MHz band

20Khz X 250(channels) = 5Mhz (@7.68 MSPS)

I am doubtful about your case. 5MHz band requires at least 10Msps.

and 20KHz x 250 = 5MHz implies channels with no spacing?