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Antonio Listi (@anmux)


With the followingThe CIC will have a step response.  The rise time determined by the frequency roll off in the decimated output.  So the 1st few samples should...
Hi Mark, here’s a bit more context so the setup is clearer.This is an incremental sigma-delta ADC, so the modulator is reset every conversion and produces a fixed-length...
Hi all,I’m fairly new to DSP and trying to evaluate whether the current filtering solution on our ASIC could be improved. Here’s the setup: Modulator: 3rd-order...

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