DSPRelated.com
Forums

Issues regarding the implementation of integrator in GMSK modulator

Started by Souparnika512 4 months ago11 replieslatest reply 4 weeks ago151 views
I'm trying to implement a GMSK modulator using simulink. Initially, I've passed the signal to a Gaussian filter, then it is passed to an integrator, but I'm not getting the results as expected. Can you please provide an insight regarding the type of integrators that can be used or designed for this purpose within simulink.
[ - ]
Reply by napiermAugust 20, 2024

This block works for me and seems to match what is in the communication block.  It will do GMSK and GFSK.

First is the FIR to provide the shaping of a raw bit and interpolation.  Next is a simple unipolar to bipolar conversion.  Then the modulation gain with is the modulation index/(2 * samples_per_symbol).  Next is the phase accumulator.  Note this is scaled so that 1 = 2*pi.  Also note the modulus function so that the phase is always in the range of [0,1).  Next is the gain by 2*pi and the sin/cos lookup.  The output from this block is baseband modulation so it must be interpolated and rotated up to your final IF frequency.

gmsk_25970.jpg

gmsk2_57396.jpg

%Init code for the mask:

ph_init = ph_off/(2*pi); % Initial phase

Ts = Tb/sps; % Sample time (seconds)

t = linspace(-span/2,span/2,(sps*span+1));

alpha = sqrt(log(2)/2)/(bt);

h = exp(-(t*pi/alpha).^2);

h = h./sum(h); % FIR filter taps







[ - ]
Reply by Souparnika512August 27, 2024

Thank you so much for the great response, I really appreciate it. I also found the masking technique in simulink through your response only and found it very convenient.

I have implemented gmsk modulator with reference to your response and also tried with the implementation of gmsk demodulator. In demodulator, since the phase of the modulated signal needs to be extracted since the information is encoded in phase changes between symbols, I made use of a differential discriminator for that purpose using the multipliers and delay units. And then used a switch to provide a threshold level to get the output in binary. The below shown is the rough draft of the blocks. But however, I'm not getting a good value during error rate calculation. If possible, could you provide an insight on where I went wrong.

In the below shown figure, I and Q are the given inputs.
gmsk_demod.png

gmsk_demod_50556.png


[ - ]
Reply by napiermAugust 27, 2024

There isn't a figure in your response.

I will also say that demod of continuous phase modulation is a difficult problem.  At least it is for me.  I put together a few blocks tinkering with methods for burst demod.  The receiver needs to get a close estimate of frequency, phase, and timing sync and start of packet in the preamble.  These need to be close enough to be able to track with PLLs during the rest of the packet RX.

I could do some of these with various methods but the full solution would be to sample the whole packet and then post process.  Not something I can do with a very modest FPGA.

I couldn't crack it and didn't find anyone who was able/willing help out so I gave up.

Also turns out that the class of IOT devices I am working with widely support GFSK so I used this as the lowest common denominator.

This type of receiver is much simpler.  It finds the average frequency offset in the preamble by averaging.  It also uses cross-correlation to find the center of the data eye.  Then track the timing in the rest of the packet.

BTW, if you sign up for the DSP Online Conference there is a presentation from a couple of years ago that does a wonderful job covering timing synchronization in a receiver.

Hope some of this helps.

Mark Napier

[ - ]
Reply by Souparnika512August 27, 2024

Sure, this was helpful. Will check out the conference presentation.

Also, I've added the figure as an image, I hope it is visible now.

[ - ]
Reply by Souparnika512October 1, 2024

gauss_59889.pngHi, I used a discrete FIR filter and then added the coefficients from the gaussdesign function in its parameters. But when I check out the scope, there is a delay occurring after filter block. And I think this delay is leading to not getting proper error rate after demodulation. Is there any other way to design a Gaussian filter? Could you please give some suggestions.

[ - ]
Reply by kazOctober 1, 2024

Just time align the two signals(input/output) that you check for errors by adding delayed copy of input equal to output delay

[ - ]
Reply by Souparnika512October 1, 2024

mod_gmsk.pngmod_gmsk_74866.png

In this figure, input 1 is bernoulli binary, in 2 is sin and 3 is cos.

demod_gmsk_ideal.pngdemod_gmsk_ideal_82652.png

Thanks for your reply. I have done that at the end of demodulator in the second figure. But not getting proper error rate, it's in range of 0.4. Can anything be done in the initial part of gaussian filter to avoid delay? If image is not clear, I've attached the corresponding file as well.

[ - ]
Reply by napiermOctober 1, 2024

A Gaussian filter is an FIR filter so delay is unavoidable in a causal implementation. The length is odd so there is a midpoint that is in the center and that you can take as the delay length.  For example, if length(h) = 21 then the equivalent delay of the filter is 11.  A delay of Z^(-11) should line up with the output of the filter. This is after you have up-sampled your bit stream at the same rate as the up-sampling FIR filter.  Likely nearest neighbor.


Also, you will need some kind of bit slicer to do the error check.  That will be in the center of your data eye.  BTW the scope trace you shared doesn't show much in the way of shaping on the output trace.  I would think at a minimum of 4 samples per bit (or symbol) the trace should be smoother.

[ - ]
Reply by Souparnika512October 3, 2024
gmsk_mod_demod_for.pnggmsk_mod_demod_for_67184.png


Thank you for your response. I have added the delay portion after the gaussian filter, but the output is coming out as earlier. And yes, the samples per symbol value is given as 1, that is why the filtering is very less, so need to increase it as you suggested. I just gave it for simulation purpose.

gmsk_filter_scope_39800.png

And regarding the bit slicer, I am getting the demodulated output in the form of binary, but data is not correct. So, in that case, do I need to use a bit slicer? I am getting the output as shown below.

demod_out_89032.png

Also, I correlated the output of final gmsk modulated wave with that of the output of ideal gmsk modulated wave, and this is the output I got. There are issues within the gmsk modulated wave, so that can also be the reason for not getting proper error rate after demodulation, right? Could you please suggest the possible issues/solutions within the above model?

mod_out_66226.png


[ - ]
Reply by kazOctober 3, 2024

Frankly I don't see that you are following a correct GMSK modulator design.

Try read this pdf before going for design:

https://complextoreal.com/wp-content/uploads/2013/...

[ - ]
Reply by Souparnika512November 12, 2024

Thank you for the support, I was able to make a working model. In addition, I would like to know what all performance metrics and other checks done on an industry level for such dsp blocks. It would be really helpful to get some insight on industry level design flow in case of dsp blocks.