ROM -BOOTING
TMS320C6211 DSP is a single map device with on chip SRAM beginning from 0x00000000 TO 0x00010000. It has a 64Kb of on- chip memory.
The device is designed to operate in little endian mode controlled by HD[8] pin. HD[8]=1 Little endian ( Default state) HD[8]=0 Big endian
Upon reset TMS320C6211 DSP loads 1Kb of code from CE1 space to the on-chip memory starting at 0x00000000 and starts executing from the 0th location. We are using winbond EPROM W27L010 which is 128K X 8 in size. The EPROM is connected at CE1 space as desired.
The DSP has 4 modes of booting i.e. (1) HPI BOOT (2) 8 bit ROM BOOT (3) 16 bit ROM BOOT (4) 32 bit ROM BOOT.
The configuration of the boot mode is selectable from the 2 pins i.e. HD[3] and HD[4].
HD[4] HD[3] 0 0 HPI BOOT 0 1 8 bit ROM BOOT ( Default state) 1 0 16 bit ROM BOOT 1 1 32 bit ROM BOOT
The HPI data bus is directly connected to the PCI-2040 bridge without a Buffering. The BOOT code burnt into the EPROM consists of the following .
(1) Initialization of all the EMIF registers. (2) Initialization of all the QDMA registers. (3) Secondary software boot loader code (4) Reset vector table.
As the hardware boot loader loads only 1Kb of code on to the on-chip memory , its not sufficient to execute , thats the reason why we go for the Secondary software boot loader. In the secondary software boot loader, we use the QDMA ( quick DMA) for the data transfer from the EPROM to the on-chip memory. The QDMA register consists of the Start address : Destination Address : Word count :
The values for the above parameters are obtained from the MAP file generated by the linker .
The reset vector table is the entry point for the user code. Here in this code the Program counter is made a jump to the _main() of the source code ( Entry point of the application code).
PROBLEMS ON HAND
(1) The Boot code was not getting loaded onto the on-chip memory from the EPROM.
Solution : The problem was suspected to be the PCI-2040 Bridge as it has a direct interface with the HPI bus of the DSP. Thus the HD[4] and HD[3] pins were lifted . The code then started to load on to the on-chip memory.
The problem in the design can be solved by having a 16 bit buffer in between the DSP and the Bridge.
(2) The code gets loaded on to the on-chip memory but does not execute. i.e. the program counter does not vary, and remains at 0x00000000.
Solution : NOT YET
Observation: There is a very interesting observation here..
When I reset, I get some code (which is actually not what I have written). When I tried to manually reset it again and again (say around 10 times continuously) I get my actual code, which I am supposed to get. But still the program counter was at 0x00000000.
When I try again and again with the reset procedure, I find some junk code getting loaded and to the surprise the Program counter change to some value i.e. PC=0x8F000000.
Then again when I switched off all the power and applied it again, I was left with the same old code with (pc=0x0000000).
Understanding: Our understanding is that the 8 bit op-codes that are burnt into the EPROM are not getting properly buffered to form the 32 bit valid op-code. As the DSP is a 32-bit processor, the EMIF has to buffer the 8 bits of data to form a 32-bit op-code.
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booting
Hello C6x Pals I want to fuse this code into the ROM ( 128Kx8). The Rom is connected at I have wriiten the custom boot code as follows ( below the map file). I tried copying the .text and .cinit sections ..but the code is not
getting can any one suggest as what sections i need to copy onchip so that the code executes.. whats the problem with this code?
Thanking you R.J.Nayaka
OUTPUT FILE NAME: <main.out>
name
origin length
used attr fill
output
attributes/ .text 0
90000200 00000700 RUN ADDR =
00000200 .cinit 0 90008000
00000054 RUN ADDR = 00008000 .const 0 00008000 00000000 UNINITIALIZED .data 0
00008000 00000000 UNINITIALIZED .cio 0 00008000 00000000 UNINITIALIZED .far 0
00008054 00000094 UNINITIALIZED .stack 0 000080e8
00000200 UNINITIALIZED .bss 0
00008000 00000000 UNINITIALIZED .sysmem 0 00008000 00000000 UNINITIALIZED
address name
address name [35 symbols] custom boot code
EMIF_GCR .equ
0x01800000 ;EMIF global control
QDMA_OPT .equ 0x02000000 ;QDMA options
register mvkh
EMIF_GCR,A4 mvkl
EMIF_CE0,A4 ;EMIF_CE0 address ->A4 mvkh
EMIF_CE0,A4 mvkl
EMIF_CE1,A4 ;EMIF_CE1 address ->A4 mvkh
EMIF_CE1,A4
mvkl QDMA_OPT,A5 ; set QDMA options ; next section b copy_section_top copy_done: ; done with section copying. -c |