Hi,
I want to do 32bit addressing in EMIF CE2. I have defined MYTPE for 32bit .
EMIF space 2 starts with word address 0x40 0000. Now I am not sure of which
address will be given for 32bit addressing- whether the same 0x40 0000 or it
should be divided by 2 again for 32 bit addressing i.e starting with 0x20
0000.
Also what abt address bus A0 and A1- should they be unused as for 32bit
addressing the the address starts with A2...
Pl suggest.
Ashish
32bit addressing in EMIF
Started by ●February 10, 2009
Reply by ●February 19, 20092009-02-19
Ashish-
> I want to do 32bit addressing in EMIF CE2. I have defined MYTPE for 32bit . EMIF
> space 2 starts with word address 0x40 0000. Now I am not sure of which address
> will be given for 32bit addressing- whether the same 0x40 0000 or it should be
> divided by 2 again for 32 bit addressing i.e starting with 0x20 0000.Also what abt
> address bus A0 and A1- should they be unused as for 32bit addressing the the
> address starts with A2...Pl suggest.
I was working on a 5502 project in early 2007... I recall that you have to divide the
EMIF memory map values shown in the data sheet by 2 for 32-bit addressing.
A2 should be connected to A0 on your EMIF device (SRAM, Flash, SDRAM devices). For
16-bit or 32-bit wide SRAM or SDRAM devices, the byte-enable signals need to be
connected.
-Jeff
> I want to do 32bit addressing in EMIF CE2. I have defined MYTPE for 32bit . EMIF
> space 2 starts with word address 0x40 0000. Now I am not sure of which address
> will be given for 32bit addressing- whether the same 0x40 0000 or it should be
> divided by 2 again for 32 bit addressing i.e starting with 0x20 0000.Also what abt
> address bus A0 and A1- should they be unused as for 32bit addressing the the
> address starts with A2...Pl suggest.
I was working on a 5502 project in early 2007... I recall that you have to divide the
EMIF memory map values shown in the data sheet by 2 for 32-bit addressing.
A2 should be connected to A0 on your EMIF device (SRAM, Flash, SDRAM devices). For
16-bit or 32-bit wide SRAM or SDRAM devices, the byte-enable signals need to be
connected.
-Jeff