hai friends, my name is vishnu. i have been working with C5502 for some time for my current project. coding is done in CCS2. in our...

hai friends, my name is vishnu. i have been working with C5502 for some time for my current project. coding is done in CCS2. in our DSP board an SDRAM is also connected. i have to configure the SDRAM. i have tried so many ways but i am not able configure the SDRAM correctly. the sdram used is MT48LC2M32B2.. it is a 512K*32*4 bank SDRAM. I have been using csl library.. but i am no...

Hi, DO any one faced some problem in updating the SDRAM interfaced to your target, In the CCS whenever it comes up. The SDRAM...

Hi, DO any one faced some problem in updating the SDRAM interfaced to your target, In the CCS whenever it comes up. The SDRAM memory area is shown as oxffff. On calling my function to configure the SDRAM , the value display still remains same. SOme times on doing software

i have 25 constant float arrays each of [128][12] when i used sections in SDRAM 10 of this arrays has address starting from 0x0200000 which...

i have 25 constant float arrays each of [128][12] when i used sections in SDRAM 10 of this arrays has address starting from 0x0200000 which i couldn't access when i checked SDRAM its 0x3b0000 length which enough to contain my data but i don't know why it doesn't fit. can any one tell me if i could use any other memory or how to store them. thanks

hello all we are doing sdram interfacing to tms320c5502 dsp processor.but some problem regarding to testing are occure.i need the...

hello all we are doing sdram interfacing to tms320c5502 dsp processor.but some problem regarding to testing are occure.i need the testing algo for testing the sdram .please guide ma.

Hello all, I'm looking to interface SDRAM to the 5502. I've been designing embedded systems for 25 years, but unfortunately (or perhaps,...

Hello all, I'm looking to interface SDRAM to the 5502. I've been designing embedded systems for 25 years, but unfortunately (or perhaps, fortunately :)) have never used any type of DRAM. My question is this: Is it possible to manually "bank" SDRAM devices like you can with SRAMs? The 5502 EMIF spec (spru621f) states that 256-Mbit is the largest device that can be used. Can I use, say, ...

Hello, I start this month to use SDRAM (64MBit) on spaces CE0 CE1, but I have some problems. I write a program that use...

Hello, I start this month to use SDRAM (64MBit) on spaces CE0 CE1, but I have some problems. I write a program that use DMA transfers from internal DARAM to SDRAM trough the EMIF controller, my problem is that the system doesn't drive the addrs A[9..12].I can use

Or a larger SDRAM? The largest one readily available that fits standard JEDEC site is 8M x 32, or 256 Mbit. -Jeff ...

Or a larger SDRAM? The largest one readily available that fits standard JEDEC site is 8M x 32, or 256 Mbit. -Jeff -------- Original Message -------- Subject: [c55x] 5502 EMIF / SDRAM Interface Date: Tue, 25 Jan 2005 10:29:19 -0600 From: Ryan Piwowarsk

Altegoist- > I use 5502 chip with 300 MHz clock frequency and configured PLLDIV3 so that > SYSCLK3=150 MHz. It is far above allowed 100 MHz...

Altegoist- > I use 5502 chip with 300 MHz clock frequency and configured PLLDIV3 so that > SYSCLK3=150 MHz. It is far above allowed 100 MHz (SPRS166J, page 58, > 3.10.4.4 External Memory Interface Clock Group) but everything seems to > be ok. The chip write and read back MT48LC4M16A2 SDRAM (166 MHz Max Clock > Frequency) properly. Have anyone tried to operate 5502 with 150MHz SDRAM > clock

Hi all! I use 5502 chip with 300 MHz clock frequency and configured PLLDIV3 so that SYSCLK3=150 MHz. It is far above allowed 100 MHz (SPRS166J,...

Hi all! I use 5502 chip with 300 MHz clock frequency and configured PLLDIV3 so that SYSCLK3=150 MHz. It is far above allowed 100 MHz (SPRS166J, page 58, 3.10.4.4 External Memory Interface Clock Group) but everything seems to be ok. The chip write and read back MT48LC4M16A2 SDRAM (166 MHz Max Clock Frequency) properly. Have anyone tried to operate 5502 with 150MHz SDRAM clock? Can I rely on this...

As above,anybody have some sample material to send to me? Am working on a skywalker board now for utilising the sdram for temporary ...

As above,anybody have some sample material to send to me? Am working on a skywalker board now for utilising the sdram for temporary storage purpose,thank

hi if my project size were 320KB which of this items is more proper and efficient regarding to speed,power,price: tms320vc5502 (300MHz) with...

hi if my project size were 320KB which of this items is more proper and efficient regarding to speed,power,price: tms320vc5502 (300MHz) with 300MHz (or 200MHz) SDRAM or TMS320vc5510 (200MHz) ? Regards

Hi All, I would like to access the SDRAM (or IRAM) on the DSP side of OMAP 1510. There is code on TI website for OMAP 5910 for...

Hi All, I would like to access the SDRAM (or IRAM) on the DSP side of OMAP 1510. There is code on TI website for OMAP 5910 for configuring the DSP MMU to map the 32 bit addresses to the 24 bit addresses on DSP side. (The physical addresses for SDRAM (or say IRAM) are the same for both OMAPs)

Hello group, I am using TMS320VC5510 version 2.1 running 200MHz. I was wondering if anyone has gotten an SDRAM running at...

Hello group, I am using TMS320VC5510 version 2.1 running 200MHz. I was wondering if anyone has gotten an SDRAM running at 100MHz to work with the 5510. If so I was hoping to get the manufacturer and part number. Currently I have a Micron 64MB 1Megx16x4 part. I can't see

All, I'm working with Alex on this project. We've initilized the SDRAM registers according to the datasheet and to reference designs, and...

All, I'm working with Alex on this project. We've initilized the SDRAM registers according to the datasheet and to reference designs, and still nothing. What seems to happen is if you write a value to odd memory locations, the value sticks and you can read it back. But, ALL odd memory locations show the same value. This is with the chip in CE1 (which does seem to drop). The chip

Ang Teik Boon- > Hi, i am Ang here.now i change the .bss into SDRAM.and it can build. But when > i try to burn the my program into flash.It...

Ang Teik Boon- > Hi, i am Ang here.now i change the .bss into SDRAM.and it can build. But when > i try to burn the my program into flash.It got no error but got no desire output. > can u know why?i suspect because i put my sound data into SDRAM., Suggest to boot your code so it loops just after entry to _c_int00, and at that point use JTAG to take a look at the .bss section. If you don't

Hi, I am working on OMAP1510 board. I need to interface external SDRAM with DSP(C55x), without using ARM. I tried using EMIF...

Hi, I am working on OMAP1510 board. I need to interface external SDRAM with DSP(C55x), without using ARM. I tried using EMIF configuration manager in DSP BIOS cdb file but could not succeed. Shall I need to do anything else after inserting EMIF configuration in cdb file?

Hello All, Can I malloc 40k memory of 5 buffers in C55x and how will I allocate these buffers from different memory sections...

Hello All, Can I malloc 40k memory of 5 buffers in C55x and how will I allocate these buffers from different memory sections Lets say one malloc operation in DARAM and others in SDRAM. I tried doing malloc keeping .sysmem at DARAM | SDRAM in .cmd file but malloc fails to

Xiyu Shi- > I am using a Spectrum Digital TMS320VC5510 DSK board to develop an > application. The application, after FlashBurn to the...

Xiyu Shi- > I am using a Spectrum Digital TMS320VC5510 DSK board to develop an > application. The application, after FlashBurn to the onboard FlashROM, > runs OK if I allocate the Data Initialization Section (.cinit) in the > SARAM(or SARAM_A/_B) via the GUI BIOS/DSP Config interface. However > if I allocate the .cinit section in SDRAM and FlashBurn to the > FlashROM, it does not work (or

Hi all, I am using a Spectrum Digital TMS320VC5510 DSK board to develop an application. The application, after FlashBurn to the onboard...

Hi all, I am using a Spectrum Digital TMS320VC5510 DSK board to develop an application. The application, after FlashBurn to the onboard FlashROM, runs OK if I allocate the Data Initialization Section (.cinit) in the SARAM(or SARAM_A/_B) via the GUI BIOS/DSP Config interface. However if I allocate the .cinit section in SDRAM and FlashBurn to the FlashROM, it does not work (or boot). In the Linke...

I have an SDRAM (MT48LC8M16A2TG) connected to 5509A and willing to use pin 16, 22 and 25 which are GPIO 8, 10, 11 respectively, as...

I have an SDRAM (MT48LC8M16A2TG) connected to 5509A and willing to use pin 16, 22 and 25 which are GPIO 8, 10, 11 respectively, as general purpose output pins. Trying all but could not change their state as I can easily do with GPIO7. I will be happy if you will help me.