A Digital-to-Analog Converter (DAC) is a peripheral or standalone IC that converts a discrete digital code into a proportional analog voltage or current. DACs are used wherever a microcontroller or DSP must produce a continuously variable analog signal, such as audio output, waveform generation, or reference voltage trimming.
In practice
Many mid-range and high-end MCUs include one or more on-chip DAC channels. Many parts in the STM32F4 and STM32G4 series include 12-bit DACs, many SAM D21 variants include a 10-bit DAC, and the Teensy 3.x/4.x boards expose DAC pins tied to Kinetis or i.MX RT peripherals (though channel count and availability vary across specific part numbers within each family). Lower-end parts such as most PIC10/12/16 devices and many MSP430 variants omit a DAC entirely, requiring an external SPI or I2C DAC such as the MCP4921 or DAC8311 when analog output is needed.
Most DAC architectures produce an output that behaves as a staircase: the output holds each sample value until the next update, a behavior known as zero-order hold (ZOH). This introduces a frequency-domain shaping effect equivalent to a sinc roll-off, attenuating high-frequency content and introducing a linear phase shift (group delay) associated with the hold interval. The amplitude droop is the key practical concern for most applications. For audio or precision waveform applications, a reconstruction (anti-aliasing) filter is placed after the DAC to smooth the steps and suppress spectral images that appear at multiples of the sample rate. The posts "DAC Zero-Order Hold Models" and "Design of an anti-aliasing filter for a DAC" cover these effects in detail, and "Design a DAC sinx/x Corrector" describes how to pre-compensate for the sinc roll-off in firmware.
Key specifications to check when selecting or configuring a DAC include resolution (bits), update rate (samples per second), settling time, output drive capability, reference voltage source, and monotonicity. Many on-chip DACs cannot drive low-impedance loads directly and require a buffer op-amp. Reference voltage accuracy and noise directly limit output accuracy regardless of bit resolution, so board-level decoupling and reference selection matter as much as the DAC's own specs.
In control and feedback applications, the DAC sits at the output of a sampled-data loop, and its update timing relative to the ADC sample and control calculation introduces latency that affects loop stability. "Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects" addresses how to account for DAC update latency when designing the control law.
Frequently asked
What is the difference between a DAC's resolution and its effective number of bits (ENOB)?
Resolution describes the number of digital codes (e.g., 4096 for a 12-bit DAC), while ENOB reflects actual noise and distortion performance measured from the signal-to-noise-and-distortion ratio (SINAD). On-chip DACs often achieve 1 to 3 fewer effective bits than their nominal resolution due to reference noise, power supply coupling, and integral nonlinearity. Always check the datasheet's SINAD or ENOB figure, not just the bit count.
Why does a DAC output need a low-pass filter, and how do I choose the cutoff frequency?
The zero-order hold behavior of a DAC creates spectral images of the
baseband signal centered at multiples of the
sample rate. A reconstruction filter attenuates these images and smooths the staircase waveform. The cutoff frequency is typically set just above the highest signal frequency of interest, with the upper bound determined by the sample rate, the locations of the spectral images, and the required attenuation at those image frequencies. For audio at 44.1 kHz, a cutoff around 20 kHz with sufficient attenuation at 24.1 kHz is a common starting point. The post 'Design of an anti-
aliasing filter for a DAC' walks through filter order and topology selection for this problem.
Can I use PWM as a substitute for a DAC?
On MCUs without a hardware DAC, a PWM output followed by an RC
low-pass filter can approximate a DC or slowly varying analog voltage. The effective resolution depends on the PWM timer frequency and clock rate (e.g., a 1 MHz PWM clock with 1000 counts per period gives roughly 10-bit resolution). Settling time and ripple are significant limitations; this approach works for slowly changing signals such as LED brightness control or simple bias generation, but is generally unsuitable for audio-rate or precision waveform output.
What is sinc (sinx/x) correction and when is it necessary?
The ZOH characteristic of a DAC rolls off the output amplitude following a sinc envelope, reaching approximately -3.9 dB at half the
sample rate (i.e., at the
Nyquist frequency). For wideband or audio applications where flat
frequency response across the full signal band is required, this attenuation can be pre-compensated by applying an inverse sinc filter in firmware before writing samples to the DAC. The post 'Design a DAC sinx/x Corrector' provides a practical approach to implementing this correction with a short
FIR or
IIR filter.
How do external SPI/I2C DACs compare to on-chip DACs for embedded use?
On-chip DACs save board space and cost but are fixed in resolution and count. External DACs such as the MCP4921 (12-bit SPI) or AD5693 (16-bit I2C) allow higher resolution, better noise isolation from the digital supply, and placement closer to the load. The tradeoff is interface overhead: each sample update requires a bus transaction, which adds latency and CPU or DMA load, and can limit achievable update rates compared to a memory-mapped on-chip peripheral.
Differentiators vs similar concepts
A DAC is sometimes confused with a PWM output used as a poor-man's analog output. A true DAC produces a voltage or current directly proportional to the digital code in one update cycle, with no ripple beyond its own noise floor. A filtered PWM signal carries ripple at the switching frequency and
harmonics, has slow settling relative to the PWM period, and trades resolution against update
bandwidth based on the timer clock. Some datasheets also label sigma-delta DACs as DACs; these are complete converter systems that use a sigma-delta modulator combined with a digital filter and output stage, trading conversion speed for resolution using noise shaping rather than the traditional R-2R or string-resistor architectures, and their output characteristics differ accordingly.
