A Recipe for a Common Logarithm Table
Cedron Dawg shows how to construct a base-10 logarithm table from scratch using only pencil-and-paper math. The recipe combines simple series for e and ln(1+x) with clever factoring and neighbor-based recurrences so minimal square-root work is required. Along the way the post explains a practical algorithm, high-accuracy interpolation and inverse-log reconstruction so you can reproduce published log tables by hand.
Sinusoidal Frequency Estimation Based on Time-Domain Samples
Rick Lyons presents three time-domain algorithms for estimating the frequency of real and complex sinusoids from samples. He shows that the Real 3-Sample and Real 4-Sample estimators, while mathematically exact, fail in the presence of noise and can produce biased or invalid outputs. The Complex 2-Sample (Lank-Reed-Pollon) estimator is more robust but can be biased at low SNR and near 0 or Fs/2, so narrowband filtering is recommended.
Three Bin Exact Frequency Formulas for a Pure Complex Tone in a DFT
Cedron Dawg derives closed-form three-bin frequency estimators for a pure complex tone in a DFT using a linear algebra view that treats three adjacent bins as a vector. He shows any vector K orthogonal to [1 1 1] yields a = (K·Z)/(K·D·Z) and derives practical K choices including a Von Hann (Pascal) kernel and a data-driven projection. The post compares estimators under noise and gives simple selection rules.
Launch of Youtube Channel: My First Videos - Embedded World 2017
Stephane Boucher turned his Embedded World 2017 trip into a debut YouTube series of short booth highlight videos. He walks through the steep learning curve of trade-show filming, the specific gear he bought and rented to cope with low light and noise, and the practical mistakes he plans to fix. The post lists filmed vendors and asks readers for feedback to improve future episodes.
A Two Bin Exact Frequency Formula for a Pure Complex Tone in a DFT
Cedron Dawg derives an exact two-bin frequency formula for a pure complex tone in the DFT, eliminating amplitude and phase to isolate frequency via a complex quotient and the complex logarithm. He presents an adjacent-bin simplification that replaces a complex multiply with a bin offset plus an atan2 angle, and discusses integer-frequency handling and aliasing. C source and numerical examples show the formula working in practice.
DFT Bin Value Formulas for Pure Complex Tones
Cedron Dawg derives closed-form DFT bin formulas for single complex exponentials, eliminating the need for brute-force summation and showing how phase acts as a uniform rotation of all bins. He also gives a Dirichlet-kernel form that yields the magnitude as (M/N)|sin(δN/2)/sin(δ/2)|, explains the large-N sinc limit, and includes C code to verify the results.
Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization
A Matlab toolbox streamlines the design and optimization of multi-stage decimation filters for sigma-delta ADCs. MSD-toolbox automates stage-count and decimation-factor selection, generates Parks-McClellan equiripple FIR coefficients, and iteratively selects coefficient quantization to meet in-band noise constraints. It accepts sigma-delta bitstream stimuli for spectral and intra-stage analysis, includes cost estimation routines, and is published open-source on MathWorks with examples and a dissertation reference.
Canonic Signed Digit (CSD) Representation of Integers
Canonic Signed Digit (CSD) encoding slashes the number of nonzero bits in integer coefficients, enabling multiplierless FIR filters implemented with shifts and adds. This post uses MATLAB code to demonstrate CSD rules, show how negative values work, and plot the distribution of signed digits as bit width changes. It finishes with practical techniques to minimize signed digits per coefficient for area and power efficient filter designs.
Frequency Translation by Way of Lowpass FIR Filtering
Rick Lyons shows how you can translate a signal down in frequency and lowpass filter it in a single operation by embedding cosine mixing values into FIR coefficients. The post explains how to build the translating FIR, how to choose the number of coefficient sets, and how decimation can dramatically reduce storage needs while noting practical constraints like the requirement that ft be an integer submultiple of fs.
Minimum Shift Keying (MSK) - A Tutorial
How does MSK achieve both excellent spectral efficiency and a constant-envelope signal suitable for nonlinear amplifiers? This tutorial builds MSK step‑by‑step from binary FSK, shows the minimum frequency spacing and continuous‑phase construction, and then recasts MSK as an OQPSK (pseudo‑symbol) representation. It finishes by generalizing MSK into CP‑FSK and the wider CPM family so you can connect practical pulse shapes and modulation indices to performance.
Instantaneous Frequency Measurement
Measuring carrier frequency quickly and with minimal data matters in radar and signal characterization. Parth Vakil explains the delay-and-multiply instantaneous frequency measurement technique, shows how analytic signals and multiple delays resolve the 2π ambiguity, and demonstrates noise, phase-wrapping, and interferer effects using MATLAB code. He also outlines practical mitigations like phase unwrapping and channelization.
Finding the Best Optimum
Optimization is seductive but often misleading, especially when mathematical models don't match messy reality. Tim Wescott shares stories from circuits and communications to show how chasing the theoretical global optimum can waste time and money. He recommends framing 'best' in practical terms, validating models, and optimizing for cost and impact so products ship on time and actually work in the real world.
Personal presentation and greetings
David Valencia joins DSPRelated from Mexico City and brings hands-on DSP projects and code. He plans to share Spectrum Digital DSK6713 examples covering GPIO control, external memory, and expansion port access, with MATLAB, C and TI DSP C implementations. Expect wavelet transform filter bank code, and occasional FPGA and CPLD notes. Stay tuned for practical, hardware-focused DSP resources.
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
Call for Speakers for the Inaugural Signal Processing Summit
Announcing the Call for Speakers for the inaugural Signal Processing Summit, happening October 14-16, 2025 in Silicon Valley. If you have practical, real-world DSP experience, including communications, audio, AI/ML, or core techniques, organizers want talks that are actionable and engineer-focused. Four tracks plus an open call for radar, imaging, biomedical, and sensor-system applications are listed; submit proposals by August 8, 2025.
Embedded TMS320C6000 Information Kick Off
Mike Dunn kicks off a series on the TMS320C6000 family, drawing on decades of hardware-first experience. He plans pragmatic posts that focus on device differences, odd quirks, and real-world debugging rather than DSP theory. Expect concise troubleshooting stories driven by his Yahoo c6x group activity and an emphasis on explaining why solutions work, not just what to do.
The Discrete Fourier Transform as a Frequency Response
Neil Robertson shows that the discrete frequency response H(k) of an FIR filter is exactly the DFT of its impulse response h(n). He derives the continuous H(ω) and discrete H(k) using complex exponentials for a four-tap FIR, then replaces h(n) with x(n) to recover the general DFT formula. The post keeps the math simple and calls out topics left for separate treatment, such as windowing and phase.
DSP Papers, Articles, Theses, etc
Stephane Boucher invites the DSP community to help expand DSPRelated's Papers and Theses repository, which currently lists just over 100 documents. He asks contributors to find and submit recent DSP PDFs, ideally from the last ten years, and notes that each approved submission enters the submitter into a draw for Michael Parker's Digital Signal Processing 101; the draw is planned for early April.
A Recipe for a Common Logarithm Table
Cedron Dawg shows how to construct a base-10 logarithm table from scratch using only pencil-and-paper math. The recipe combines simple series for e and ln(1+x) with clever factoring and neighbor-based recurrences so minimal square-root work is required. Along the way the post explains a practical algorithm, high-accuracy interpolation and inverse-log reconstruction so you can reproduce published log tables by hand.
Sensors Expo - Trip Report & My Best Video Yet!
Stephane Boucher turns a first-time Sensors Expo visit into a fun travelogue and a polished conference highlights video. He mixes candid trip anecdotes from Moncton to San Jose, electric-scooter discoveries, Santa Cruz detours, Airbnb tips, and on-the-floor expo footage. The post culminates in what he calls his best highlights reel yet, plus a follow-up video focused on embedded and IoT.
Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators
You can extract high-quality, high-sample-rate sine waves from FPGAs even when floating-point units are constrained by latency. This article compares Intel's NCO IP (multiplier option) with floating-point recursive biquads on Cyclone V and Cyclone 10 GX, and explains a boosted-sample-rate technique that pushes performance toward a 48Msps DAC target. Practical measurement results, spectral data, and resource/cost trade-offs are highlighted.
Learn to Use the Discrete Fourier Transform
Discrete-time sequences arise in many ways: a sequence could be a signal captured by an analog-to-digital converter; a series of measurements; a signal generated by a digital modulator; or simply the coefficients of a digital filter. We may wish to know the frequency spectrum of any of these sequences. The most-used tool to accomplish this is the Discrete Fourier Transform (DFT), which computes the discrete frequency spectrum of a discrete-time sequence. The DFT is easily calculated using software, but applying it successfully can be challenging. This article provides Matlab examples of some techniques you can use to obtain useful DFT’s.
Specifying the Maximum Amplifier Noise When Driving an ADC
You can quantify how much amplifier noise is acceptable before adding gain actually hurts an ADC's output SNR. Rick Lyons presents a compact rule showing the amplifier input-referred noise power must be less than (1 - 1/α^2) times the ADC's q^2/12 quantization noise power, with Eq. (8) and a pair of figures that make it easy to pick or specify the right amplifier for a given gain α.
Somewhat Off Topic: Deciphering Transistor Terminology
Rick Lyons unpacks a small linguistic mystery in electronics, revealing why the transistor's middle terminal is called the "base". He traces the name to the 1949 Bell Labs "semiconductor triode", where the device sat on a metal base plate described as a large-area low-resistance contact, and notes that later transistor sandwich designs kept the name for historical reasons. The post includes original references and a few trivia nuggets.
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
Adaptive Beamforming is like Squeezing a Water Balloon
Think of adaptive beamforming as squeezing a water balloon, a simple analogy that reveals how combining multiple antennas creates focused gains and deep nulls. This post walks through the MVDR (Wiener-filter–based) solution, explains steering and scanning vectors, and shows how array geometry and known signal direction control what you can and cannot cancel. Practical tips highlight limits like the N-1 interferer rule.
Add the Hilbert Transformer to Your DSP Toolkit, Part 1
Learn how the Hilbert transformer creates a 90-degree phase-shifted quadrature component without down-conversion, and why it is simply a special FIR filter. Part 1 defines the transformer, derives its ideal frequency response H(ω)=j for ω<0 and -j for ω≥0, and walks through Matlab examples that demonstrate phase shifting and image attenuation for bandpass signals.
Sonos, Shut Up and Take My Money! - Is Spatial Audio Finally Here?
Stephane bought a Sonos ERA 300 and discovered that spatial audio can finally feel convincing from a single wireless speaker, provided you set it up correctly. The trick is using Dolby Atmos tracks played inside the Sonos app, plus Sonos' calibration and a close listening position. The post shares setup tips, vivid listening impressions, and encouragement for more spatial mixes to come.
The 2021 DSP Online Conference
Packed with practical talks and hands-on workshops, the 2021 DSP Online Conference gives DSP engineers a quick way to refresh skills and learn new techniques. Registering grants full access to talks, workshops, and Q&A at this year's event plus instant access to last year's videos. Highlights include FIR filter design with Python, software-defined radio, convolution reviews, and DSP/ML tools for IoT, with registration discounts on request.
Feedback Controllers - Making Hardware with Firmware. Part I. Introduction
This first post kicks off a series on using DSP and feedback control with mixed-signal electronics and FPGAs to emulate two-terminal circuits and create low latency controllers. It frames circuit emulation as a feedback problem, highlights latency as the key practical constraint, and outlines the planned evaluation hardware, target devices, and software tools that will be used in later MATLAB/Simulink and FPGA work.
