A Recipe for a Common Logarithm Table
Cedron Dawg shows how to construct a base-10 logarithm table from scratch using only pencil-and-paper math. The recipe combines simple series for e and ln(1+x) with clever factoring and neighbor-based recurrences so minimal square-root work is required. Along the way the post explains a practical algorithm, high-accuracy interpolation and inverse-log reconstruction so you can reproduce published log tables by hand.
Sinusoidal Frequency Estimation Based on Time-Domain Samples
Rick Lyons presents three time-domain algorithms for estimating the frequency of real and complex sinusoids from samples. He shows that the Real 3-Sample and Real 4-Sample estimators, while mathematically exact, fail in the presence of noise and can produce biased or invalid outputs. The Complex 2-Sample (Lank-Reed-Pollon) estimator is more robust but can be biased at low SNR and near 0 or Fs/2, so narrowband filtering is recommended.
Three Bin Exact Frequency Formulas for a Pure Complex Tone in a DFT
Cedron Dawg derives closed-form three-bin frequency estimators for a pure complex tone in a DFT using a linear algebra view that treats three adjacent bins as a vector. He shows any vector K orthogonal to [1 1 1] yields a = (K·Z)/(K·D·Z) and derives practical K choices including a Von Hann (Pascal) kernel and a data-driven projection. The post compares estimators under noise and gives simple selection rules.
Launch of Youtube Channel: My First Videos - Embedded World 2017
Stephane Boucher turned his Embedded World 2017 trip into a debut YouTube series of short booth highlight videos. He walks through the steep learning curve of trade-show filming, the specific gear he bought and rented to cope with low light and noise, and the practical mistakes he plans to fix. The post lists filmed vendors and asks readers for feedback to improve future episodes.
A Two Bin Exact Frequency Formula for a Pure Complex Tone in a DFT
Cedron Dawg derives an exact two-bin frequency formula for a pure complex tone in the DFT, eliminating amplitude and phase to isolate frequency via a complex quotient and the complex logarithm. He presents an adjacent-bin simplification that replaces a complex multiply with a bin offset plus an atan2 angle, and discusses integer-frequency handling and aliasing. C source and numerical examples show the formula working in practice.
DFT Bin Value Formulas for Pure Complex Tones
Cedron Dawg derives closed-form DFT bin formulas for single complex exponentials, eliminating the need for brute-force summation and showing how phase acts as a uniform rotation of all bins. He also gives a Dirichlet-kernel form that yields the magnitude as (M/N)|sin(δN/2)/sin(δ/2)|, explains the large-N sinc limit, and includes C code to verify the results.
Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization
A Matlab toolbox streamlines the design and optimization of multi-stage decimation filters for sigma-delta ADCs. MSD-toolbox automates stage-count and decimation-factor selection, generates Parks-McClellan equiripple FIR coefficients, and iteratively selects coefficient quantization to meet in-band noise constraints. It accepts sigma-delta bitstream stimuli for spectral and intra-stage analysis, includes cost estimation routines, and is published open-source on MathWorks with examples and a dissertation reference.
Canonic Signed Digit (CSD) Representation of Integers
Canonic Signed Digit (CSD) encoding slashes the number of nonzero bits in integer coefficients, enabling multiplierless FIR filters implemented with shifts and adds. This post uses MATLAB code to demonstrate CSD rules, show how negative values work, and plot the distribution of signed digits as bit width changes. It finishes with practical techniques to minimize signed digits per coefficient for area and power efficient filter designs.
Frequency Translation by Way of Lowpass FIR Filtering
Rick Lyons shows how you can translate a signal down in frequency and lowpass filter it in a single operation by embedding cosine mixing values into FIR coefficients. The post explains how to build the translating FIR, how to choose the number of coefficient sets, and how decimation can dramatically reduce storage needs while noting practical constraints like the requirement that ft be an integer submultiple of fs.
Minimum Shift Keying (MSK) - A Tutorial
How does MSK achieve both excellent spectral efficiency and a constant-envelope signal suitable for nonlinear amplifiers? This tutorial builds MSK step‑by‑step from binary FSK, shows the minimum frequency spacing and continuous‑phase construction, and then recasts MSK as an OQPSK (pseudo‑symbol) representation. It finishes by generalizing MSK into CP‑FSK and the wider CPM family so you can connect practical pulse shapes and modulation indices to performance.
Two Easy Ways To Test Multistage CIC Decimation Filters
Rick Lyons shows that you can validate multistage CIC decimation filters with just two obvious tests, no elaborate spectral setup required. Apply a unit-sample impulse to check a combinatorial yout(1) value when D ≥ S, or feed an all-ones step to confirm an S-sample transient followed by a DS steady state; the Appendix ties both checks to Pascal's triangle and binomial math.
Four Ways to Compute an Inverse FFT Using the Forward FFT Algorithm
Rick Lyons lays out four practical techniques to get an inverse FFT when you only have forward FFT software or FPGA cores available. The post highlights a classic data-reversal trick, a conjugate-symmetry optimized flow, and two methods that avoid reversals using data swapping or complex conjugation plus scaling. Each method notes when it is preferable so engineers can pick the least costly implementation.
Differentiating and integrating discrete signals
Think DSP's new chapter digs into discrete differentiation and integration, using first differences, convolution, and FFTs to compare time and frequency domain views. The author reproduces diff via convolution then explores cumsum as its inverse and runs into two puzzling mismatches: noisy FFT amplitude ratios for nonperiodic data, and a time-domain convolution that does not reproduce cumsum for a sawtooth despite matching frequency responses. The post includes IPython notebooks and invites troubleshooting.
Software Defined Radio at SAMOS
At SAMOS, the SDR track drew a strong academic crowd, with groups from UMich, Wisconsin-Madison, Linköping, IMEC, and others presenting their latest ideas. Praveen Raghavan also notes that IMEC finally made its SyncPro architecture public, a vector synchronization processor design. The post gives a quick snapshot of where software defined radio research was active, and which major industry names were noticeably absent.
Canonic Signed Digit (CSD) Representation of Integers
Canonic Signed Digit (CSD) encoding slashes the number of nonzero bits in integer coefficients, enabling multiplierless FIR filters implemented with shifts and adds. This post uses MATLAB code to demonstrate CSD rules, show how negative values work, and plot the distribution of signed digits as bit width changes. It finishes with practical techniques to minimize signed digits per coefficient for area and power efficient filter designs.
Wavelets I - From Filter Banks to the Dilation Equation
Starting from a practical cascaded FIR filter bank, this post derives the key equations behind the Fast Wavelet Transform. It shows how conjugate-quadrature analysis and synthesis filters give perfect reconstruction and how iterating the cascade produces the scaling function, leading to the dilation equation. DB4 coefficients are used as a concrete example and a linear-system trick yields exact integer-sample values of the scaling function.
Above-Average Smoothing of Impulsive Noise
This post introduces a smoothing trick that behaves a lot like a moving average for high-frequency noise, but does a much better job of suppressing impulsive spikes. Rick Lyons shows how the corrected average is computed from the sample count, the sample imbalance around the mean, and the total deviation. He also compares the method against a standard moving average on a noisy step signal, where the improvement is easy to see.
Weighted least-squares FIR with shared coefficients
Markus Nentwig demonstrates how to design FIR filters that share coefficients across delay taps, allowing multiplier reuse and reduced implementation cost. He reimplements Lawson's iterative reweighted least-squares for complex-valued FIRs and provides Matlab/Octave code you can adapt for nonstandard constraints. The post explains iteration weight logic, the Toeplitz special-case with Levinson-Durbin, and practical trade-offs between multiplier count and stopband performance.
The Freshers Interview Guide
Hiring managers see the same avoidable mistakes from new grads, so Jeff offers blunt, practical advice to fix them. This short guide explains why honesty, solid debugging skills, and clear resumes matter more than cramming technical facts, and shows how to demonstrate problem-solving, organization, and teamwork in an interview to stand out as a reliable entry-level DSP or EE candidate.
How Discrete Signal Interpolation Improves D/A Conversion
Digital interpolation can drastically simplify the analog filtering that follows a DAC, lowering cost and improving output quality. Rick Lyons explains how inserting zeros and applying a digital lowpass filter (interpolation-by-two) raises the effective sample rate, reduces the DAC sin(x)/x droop, and widens the analog filter transition band. The post gives practical intuition and spectral illustrations engineers can reuse in real designs.
Specifying the Maximum Amplifier Noise When Driving an ADC
You can quantify how much amplifier noise is acceptable before adding gain actually hurts an ADC's output SNR. Rick Lyons presents a compact rule showing the amplifier input-referred noise power must be less than (1 - 1/α^2) times the ADC's q^2/12 quantization noise power, with Eq. (8) and a pair of figures that make it easy to pick or specify the right amplifier for a given gain α.
Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators
You can extract high-quality, high-sample-rate sine waves from FPGAs even when floating-point units are constrained by latency. This article compares Intel's NCO IP (multiplier option) with floating-point recursive biquads on Cyclone V and Cyclone 10 GX, and explains a boosted-sample-rate technique that pushes performance toward a 48Msps DAC target. Practical measurement results, spectral data, and resource/cost trade-offs are highlighted.
Somewhat Off Topic: Deciphering Transistor Terminology
Rick Lyons unpacks a small linguistic mystery in electronics, revealing why the transistor's middle terminal is called the "base". He traces the name to the 1949 Bell Labs "semiconductor triode", where the device sat on a metal base plate described as a large-area low-resistance contact, and notes that later transistor sandwich designs kept the name for historical reasons. The post includes original references and a few trivia nuggets.
Sonos, Shut Up and Take My Money! - Is Spatial Audio Finally Here?
Stephane bought a Sonos ERA 300 and discovered that spatial audio can finally feel convincing from a single wireless speaker, provided you set it up correctly. The trick is using Dolby Atmos tracks played inside the Sonos app, plus Sonos' calibration and a close listening position. The post shares setup tips, vivid listening impressions, and encouragement for more spatial mixes to come.
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
Adaptive Beamforming is like Squeezing a Water Balloon
Think of adaptive beamforming as squeezing a water balloon, a simple analogy that reveals how combining multiple antennas creates focused gains and deep nulls. This post walks through the MVDR (Wiener-filter–based) solution, explains steering and scanning vectors, and shows how array geometry and known signal direction control what you can and cannot cancel. Practical tips highlight limits like the N-1 interferer rule.
Learn to Use the Discrete Fourier Transform
Discrete-time sequences arise in many ways: a sequence could be a signal captured by an analog-to-digital converter; a series of measurements; a signal generated by a digital modulator; or simply the coefficients of a digital filter. We may wish to know the frequency spectrum of any of these sequences. The most-used tool to accomplish this is the Discrete Fourier Transform (DFT), which computes the discrete frequency spectrum of a discrete-time sequence. The DFT is easily calculated using software, but applying it successfully can be challenging. This article provides Matlab examples of some techniques you can use to obtain useful DFT’s.
The 2021 DSP Online Conference
Packed with practical talks and hands-on workshops, the 2021 DSP Online Conference gives DSP engineers a quick way to refresh skills and learn new techniques. Registering grants full access to talks, workshops, and Q&A at this year's event plus instant access to last year's videos. Highlights include FIR filter design with Python, software-defined radio, convolution reviews, and DSP/ML tools for IoT, with registration discounts on request.
Add the Hilbert Transformer to Your DSP Toolkit, Part 1
Learn how the Hilbert transformer creates a 90-degree phase-shifted quadrature component without down-conversion, and why it is simply a special FIR filter. Part 1 defines the transformer, derives its ideal frequency response H(ω)=j for ω<0 and -j for ω≥0, and walks through Matlab examples that demonstrate phase shifting and image attenuation for bandpass signals.
Feedback Controllers - Making Hardware with Firmware. Part I. Introduction
This first post kicks off a series on using DSP and feedback control with mixed-signal electronics and FPGAs to emulate two-terminal circuits and create low latency controllers. It frames circuit emulation as a feedback problem, highlights latency as the key practical constraint, and outlines the planned evaluation hardware, target devices, and software tools that will be used in later MATLAB/Simulink and FPGA work.
