DSPRelated.com

Design IIR Butterworth Filters Using 12 Lines of Code

Neil RobertsonNeil Robertson December 10, 201711 comments

Build a working lowpass IIR Butterworth filter from first principles in just 12 lines of Matlab using Neil Robertson's butter_synth.m. The post walks through the analog prototype poles, frequency pre-warping, bilinear transform pole mapping, adding N zeros at z = -1, and gain normalization so the result matches Matlab's built-in butter function. It's a compact, hands-on guide with clear formulas and code.


Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.

Steve MaslenSteve Maslen December 3, 20177 comments

Self-calibration is the missing piece that turns this mixed-signal hardware from a prototype into a usable instrument. In this installment, the author lays out how the board will measure itself, generate reference signals, and verify ADC and DAC behavior before the low-latency control firmware is built. The result is a practical framework for evaluation, production test, and routine self-test.


Simplest Calculation of Half-band Filter Coefficients

Neil RobertsonNeil Robertson November 20, 20179 comments

Half-band FIR filters put the cutoff at one-quarter of the sampling rate, and nearly half their coefficients are exactly zero, which makes them highly efficient for decimation-by-2 and interpolation-by-2. This post shows the straightforward window-method derivation of half-band coefficients from the ideal sinc impulse response, providing a clear, hands-on explanation for engineers learning filter design. It also points to equiripple options such as Matlab's firhalfband and a later Parks-McClellan implementation.


Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.

Steve MaslenSteve Maslen November 14, 2017

This installment digs into practical FPGA choices and board-level issues for a low-latency, floating-point feedback controller. It compares a Cyclone V implementation against an older SHARC-based design, quantifies the tradeoff between raw DSP resources and cycle latency, and calls out Gotchas found on the BeMicro CV A9 evaluation card. Engineers get concrete prompts for where to optimize: clocking, DSP-block use, I/O standards, and algorithm partitioning.


Improved Three Bin Exact Frequency Formula for a Pure Real Tone in a DFT

Cedron DawgCedron Dawg November 6, 2017

Cedron Dawg extends his two-bin exact frequency formulas to a three-bin DFT estimator for a pure real tone, and presents the derivation in computational order for practical use. The method splits complex bin values into real and imaginary parts, forms vectors A, B, and C, applies a sqrt(2) variance rescaling, and computes frequency via a projection-based closed form. Numerical tests compare the new formula to prior work and show improved accuracy when the tone lies between bins.


There's No End to It -- Matlab Code Plots Frequency Response above the Unit Circle

Neil RobertsonNeil Robertson October 23, 20179 comments

If you want a fresh way to inspect a digital filter, this post introduces plotfil3d, a compact MATLAB function that wraps the magnitude response around the unit circle in the Z-plane so you can view it in 3D. It uses freqz to compute H(z) in dB for N points and accepts an optional azimuth to change the viewing angle; the code is provided in the appendix.


There and Back Again: Time of Flight Ranging between Two Wireless Nodes

Qasim ChaudhariQasim Chaudhari October 23, 20175 comments

Conventional timestamping seems too coarse for centimeter-level RF ranging, yet many products claim and deliver that precision. This post unpacks the fundamentals behind high-resolution wireless ranging, contrasting common RF approaches such as RSSI, ToA, PoA, TDoA, and AoA. It also explains how device timestamps and counter registers work, giving engineers a practical starting point for implementing or evaluating time-of-flight ranging systems.


Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware

Steve MaslenSteve Maslen October 10, 2017

This installment follows the hardware from concept to first power-up for a low-latency feedback controller and arbitrary circuit emulator. It walks through the practical engineering steps, from requirements, block diagrams, and issue tracking to component selection, simulation, PCB planning, purchasing, and staged bring-up. The result is a realistic look at how careful due diligence and a few trade-offs turned a research idea into working evaluation hardware.


Online DSP Classes: Why Such a High Dropout Rate?

Rick LyonsRick Lyons October 7, 201718 comments

Rick Lyons digs into a startling statistic: online DSP courses reported a 97% dropout rate. He argues the main culprits are math-heavy curricula that overwhelm beginners and rigid, non-self-paced schedules that demand sustained 8-10+ hours per week. Rick urges course creators to rethink pacing and mathematical depth to improve completion rates and student engagement.


Two Bin Exact Frequency Formulas for a Pure Real Tone in a DFT

Cedron DawgCedron Dawg October 4, 20179 comments

Cedron Dawg derives exact, closed-form frequency formulas that recover a pure real tone from just two DFT bins using a geometric vector approach. The method projects bin-derived vectors onto a plane orthogonal to a constraint vector to eliminate amplitude and phase, yielding an explicit cos(alpha) estimator; a small adjustment improves noise performance so the estimator rivals and slightly betters earlier two-bin methods.


The Discrete Fourier Transform as a Frequency Response

Neil RobertsonNeil Robertson February 4, 20238 comments

Neil Robertson shows that the discrete frequency response H(k) of an FIR filter is exactly the DFT of its impulse response h(n). He derives the continuous H(ω) and discrete H(k) using complex exponentials for a four-tap FIR, then replaces h(n) with x(n) to recover the general DFT formula. The post keeps the math simple and calls out topics left for separate treatment, such as windowing and phase.


Summary of ROC Rules

Magnus VallestadMagnus Vallestad November 26, 20152 comments

This is a very short guide on how to find all possible outcomes of a system where Region of Convergence (ROC) and the original signal is not known.


Reduced-Delay IIR Filters

Rick LyonsRick Lyons July 4, 201919 comments

Rick Lyons investigates a simple 2nd-order IIR modification that reduces passband group delay by just under one sample, inspired by Steve Maslen's reduced-delay concept. He walks through the conversion steps and compares z-plane, magnitude, and group-delay plots for Butterworth, elliptic, and Chebyshev prototypes, showing how zeros shift and stopband attenuation degrades. A linked PDF extends the study to 1st-, 3rd-, and 4th-order cases so you can follow the tradeoffs.


The Swiss Army Knife of Digital Networks

Rick LyonsRick Lyons June 13, 201612 comments

A single discrete-signal network can masquerade as a comb filter, a recursive section, or something much more versatile. Rick Lyons shows how this seven-coefficient structure can be reconfigured to realize a wide range of DSP functions, with tables of impulse responses, pole-zero plots, and frequency responses to illustrate each case. The full explanations live in the downloadable PDF, but the post gives a strong feel for why this is such a handy building block.


Improved Narrowband Lowpass IIR Filters

Rick LyonsRick Lyons November 6, 20101 comment

Rick Lyons presents a practical trick from his DSP book that makes narrowband lowpass IIR filters usable in fixed-point systems. By replacing unit delays with M-length delay lines to form an interpolated-IIR, pole radii and angles are transformed so desired poles fall into quantizer-friendly locations without wider coefficient words or extra multiplies. A following CIC image-reject stage removes replicated passbands to meet tight stopband specs.


Online DSP Classes: Why Such a High Dropout Rate?

Rick LyonsRick Lyons October 7, 201718 comments

Rick Lyons digs into a startling statistic: online DSP courses reported a 97% dropout rate. He argues the main culprits are math-heavy curricula that overwhelm beginners and rigid, non-self-paced schedules that demand sustained 8-10+ hours per week. Rick urges course creators to rethink pacing and mathematical depth to improve completion rates and student engagement.


Differentiating and integrating discrete signals

Allen DowneyAllen Downey December 14, 20152 comments

Think DSP's new chapter digs into discrete differentiation and integration, using first differences, convolution, and FFTs to compare time and frequency domain views. The author reproduces diff via convolution then explores cumsum as its inverse and runs into two puzzling mismatches: noisy FFT amplitude ratios for nonperiodic data, and a time-domain convolution that does not reproduce cumsum for a sawtooth despite matching frequency responses. The post includes IPython notebooks and invites troubleshooting.


Curse you, iPython Notebook!

Christopher FeltonChristopher Felton May 1, 20124 comments

Christopher Felton shares a cautionary tale about losing an ipython 0.12 notebook session after assuming the browser would save his interactive edits. He explains that notebooks at the time required clicking the top Save button to persist sessions, and autosave was not yet available. He recommends basing interactive work on scripts, saving often, and testing export behavior to avoid redoing text, LaTeX, and plots.


Crowdfunding Articles?

Stephane BoucherStephane Boucher April 12, 201828 comments

Technical writers in the embedded world often have the expertise, but not always the time or incentive to turn it into a post. Stephane Boucher explores a crowdfunding model for technical articles, where readers would pledge small amounts to back promising abstracts before the writing begins. It is an interesting attempt to create more high quality EE content by paying authors upfront.


A Fast Real-Time Trapezoidal Rule Integrator

Rick LyonsRick Lyons June 13, 20204 comments

Rick Lyons presents a compact, recursive real-time Trapezoidal Rule integrator that computes N-sample discrete integration using only four arithmetic operations per input sample. The proposed network yields a finite-length, linear-phase impulse response with constant group delay (N-1)/2 and cuts substantial computation compared with a tapped-delay implementation, making it useful for speeding Romberg-based digital filters.