Polar Coding Notes: A Simple Proof
For any B-DMC $W$, the channels $\{W_N^{(i)}\}$ polarize in the sense that, for any fixed $\delta \in (0, 1)$, as $N$ goes to infinity through powers of two, the fraction of indices $i \in \{1, \dots, N\}$ for which $I(W_N^{(i)}) \in (1 − \delta, 1]$ goes to $I(W)$ and the fraction for which $I(W_N^{(i)}) \in [0, \delta)$ goes to $1−I(W)^{[1]}$.
Mrs. Gerber’s Lemma
Mrs. Gerber’s Lemma provides a lower bound on the entropy of the modulo-$2$ sum of two binary random...
Polar Coding Notes: Channel Combining and Channel Splitting
Channel Combining
Channel combining is a step that combines copies of a given B-DMC $W$ in a recursive manner to produce a vector channel $W_N : {\cal X}^N \to {\cal Y}^N$, where $N$ can be any power of two, $N=2^n, n\le0^{[1]}$.
The notation $u_1^N$ as shorthand for denoting a row vector $(u_1, \dots , u_N)$.
The vector channel $W_N$ is the virtual channel between the input sequence $u_1^N$ to a linear encoder and the output sequence $y^N_1$ of $N$...
Project Report : Digital Filter Blocks in MyHDL and their integration in pyFDA
The Google Summer of Code 2018 is now in its final stages, and I’d like to take a moment to look back at what goals were accomplished, what remains to be completed and what I have learnt.
The project overview was discussed in the previous blog posts. However this post serves as a guide to anyone who wishes to learn about the project or carry it forward. Hence I will go over the project details again.
Project overviewThe project “Digital Filter Blocks in MyHDL and PyFDA integration" aims...
Sensors Expo - Trip Report & My Best Video Yet!
This was my first time at Sensors Expo and my second time in Silicon Valley and I must say I had a great time.
Before I share with you what I find to be, by far, my best 'highlights' video yet for a conference/trade show, let me try to entertain you with a few anecdotes from this trip. If you are not interested by my stories or maybe don't have the extra minutes needed to read them, please feel free to skip to the end of this blog post to watch the...
Design a DAC sinx/x Corrector
This post provides a Matlab function that designs linear-phase FIR sinx/x correctors. It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.
A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process. In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses. These are converted by the DAC into contiguous pulses...
Off Topic: Refraction in a Varying Medium
Introduction
This article is another digression from a better understanding of the DFT. In fact, it is a digression from DSP altogether. However, since many of the readers here are Electrical Engineers and other folks who are very scientifically minded, I hope this article is of interest. A differential vector equation is derived for the trajectory of a point particle in a field of varying index of refraction. This applies to light, of course, but since it is a purely theoretical...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
Project update-2 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This is an exciting update in the sense that it demonstrates a working model of one important aspect of the project: The integration or ‘glue’ between and Pyfda and MyHDL filter blocks.
So, why do we need to integrate and how do we go about it?
As discussed in earlier posts, the idea is to provide a workflow in Pyfda that automates the process of Implementing a fixpoint filter in VHDL / Verilog, and verify the correct performance in a digital design environment. MyHDL based...
Project update-1 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This blog post presents the progress made up to week 5 in my GSoC project “Digital Filter blocks and their integration in PyFDA”. Progress was made in two areas of the project.
This post will primarily discuss filter block implementation. The interface will be discussed in a later post once further progress is made.
Direct form-I FIR filterThe equation specifies the direct form I...
Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction
Last time, we talked about error correction and detection, covering some basics like Hamming distance, CRCs, and Hamming codes. If you are new to this topic, I would strongly suggest going back to read that article before this one.
This time we are going to cover Reed-Solomon codes. (I had meant to cover this topic in Part XV, but the article was getting to be too long, so I’ve split it roughly in half.) These are one of the workhorses of error-correction, and they are used in...
Interpolator Design: Get the Stopbands Right
In this article, I present a simple approach for designing interpolators that takes the guesswork out of determining the stopbands.
Generating Complex Baseband and Analytic Bandpass Signals
There are so many different time- and frequency-domain methods for generating complex baseband and analytic bandpass signals that I had trouble keeping those techniques straight in my mind. Thus, for my own benefit, I created a kind of reference table showing those methods. I present that table for your viewing pleasure in this blog.
For clarity, I define a complex baseband signal as follows: derived from an input analog xbp(t)bandpass signal whose spectrum is shown in Figure 1(a), or...
5G NR QC-LDPC Encoding Algorithm
3GPP 5G has been focused on structured LDPC codes known as quasi-cyclic low-density parity-check (QC-LDPC) codes, which exhibit advantages over other types of LDPC codes with respect to the hardware implementations of encoding and decoding using simple shift registers and logic circuits.
5G NR QC-LDPC Circulant Permutation MatrixA circular permutation matrix ${\bf I}(P_{i,j})$ of size $Z_c \times Z_c$ is obtained by circularly shifting the identity matrix $\bf I$ of...
The Zeroing Sine Family of Window Functions
IntroductionThis is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT) by introducing a class of well behaved window functions that the author believes to be previously unrecognized. The definition and some characteristics are displayed. The heavy math will come in later articles. This is an introduction to the family, and a very special member of it.
This is one of my longer articles. The bulk of the material is in the front half. The...
Modeling Anti-Alias Filters
Digitizing a signal using an Analog to Digital Converter (ADC) usually requires an anti-alias filter, as shown in Figure 1a. In this post, we’ll develop models of lowpass Butterworth and Chebyshev anti-alias filters, and compute the time domain and frequency domain output of the ADC for an example input signal. We’ll also model aliasing of Gaussian noise. I hope the examples make the textbook explanations of aliasing seem a little more real. Of course, modeling of...
Signal Processing Contest in Python (PREVIEW): The Worst Encoder in the World
When I posted an article on estimating velocity from a position encoder, I got a number of responses. A few of them were of the form "Well, it's an interesting article, but at slow speeds why can't you just take the time between the encoder edges, and then...." My point was that there are lots of people out there which take this approach, and don't take into account that the time between encoder edges varies due to manufacturing errors in the encoder. For some reason this is a hard concept...
Computing Large DFTs Using Small FFTs
It is possible to compute N-point discrete Fourier transforms (DFTs) using radix-2 fast Fourier transforms (FFTs) whose sizes are less than N. For example, let's say the largest size FFT software routine you have available is a 1024-point FFT. With the following trick you can combine the results of multiple 1024-point FFTs to compute DFTs whose sizes are greater than 1024.
The simplest form of this idea is computing an N-point DFT using two N/2-point FFT operations. Here's how the trick...
Optimizing the Half-band Filters in Multistage Decimation and Interpolation
This blog discusses a not so well-known rule regarding the filtering in multistage decimation and interpolation by an integer power of two. I'm referring to sample rate change systems using half-band lowpass filters (LPFs) as shown in Figure 1. Here's the story.
Figure 1: Multistage decimation and interpolation using half-band filters.
Multistage Decimation – A Very Brief ReviewFigure 2(a) depicts the process of decimation by an integer factor D. That...
Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.
- Part 6: Self-Calibration, Measurements and Signalling (this part)
- Part 5:
Compute the Frequency Response of a Multistage Decimator
Figure 1a shows the block diagram of a decimation-by-8 filter, consisting of a low-pass finite impulse response (FIR) filter followed by downsampling by 8 [1]. A more efficient version is shown in Figure 1b, which uses three cascaded decimate-by-two filters. This implementation has the advantages that only FIR 1 is sampled at the highest sample rate, and the total number of filter taps is lower.
The frequency response of the single-stage decimator before downsampling is just...
An Astounding Digital Filter Design Application
I've recently encountered a digital filter design application that astonished me with its design flexibility, capability, and ease of use. The software is called the "ASN Filter Designer." After experimenting with a demo version of this filter design software I was so impressed that I simply had publicize it to the subscribers here on dsprelated.com.
What I Liked About the ASN Filter DesignerWith typical filter design software packages the user enters numerical values for the...
Two jobs
For those of you following closely embeddedrelated and the other related sites, you might have noticed that I have been less active for the last couple of months, and I will use this blog post to explain why. The main reason is that I got myself involved into a project that ended up using a better part of my cpu than I originally thought it would.
edit - video of the event:
I currently have two jobs: one as an electrical/dsp engineer recycled as a web publisher and the other...
Discrete Wavelet Transform Filter Bank Implementation (part 1)
UPDATE: Added graphs and code to explain the frequency division of the branches
The focus of this article is to briefly explain an implementation of this transform and several filter bank forms. Theoretical information about DWT can be found elsewhere.
First of all, a 'quick and dirty' simplified explanation of the differences between DFT and DWT:
The DWT (Discrete Wavelet Transform), simply put, is an operation that receives a signal as an input (a vector of data) and...
Spline interpolation
A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog
IntroductionSplines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...
Canonic Signed Digit (CSD) Representation of Integers
In my last post I presented Matlab code to synthesize multiplierless FIR filters using Canonic Signed Digit (CSD) coefficients. I included a function dec2csd1.m (repeated here in Appendix A) to convert decimal integers to binary CSD values. Here I want to use that function to illustrate a few properties of CSD numbers.
In a binary signed-digit number system, we allow each binary digit to have one of the three values {0, 1, -1}. Thus, for example, the binary value 1 1...
Compute the Frequency Response of a Multistage Decimator
Figure 1a shows the block diagram of a decimation-by-8 filter, consisting of a low-pass finite impulse response (FIR) filter followed by downsampling by 8 [1]. A more efficient version is shown in Figure 1b, which uses three cascaded decimate-by-two filters. This implementation has the advantages that only FIR 1 is sampled at the highest sample rate, and the total number of filter taps is lower.
The frequency response of the single-stage decimator before downsampling is just...
Should DSP Undergraduate Students Study z-Transform Regions of Convergence?
Not long ago I presented my 3-day DSP class to a group of engineers at Tektronix Inc. in Beaverton Oregon [1]. After I finished covering my material on IIR filters' z-plane pole locations and filter stability, one of the Tektronix engineers asked a question similar to:
"I noticed that you didn't discuss z-plane regions of convergence here. In my undergraduate DSP class we spent a lot of classroom and homework time on the ...
A Simple Complex Down-conversion Scheme
Recently I was experimenting with complex down-conversion schemes. That is, generating an analytic (complex) version, centered at zero Hz, of a real bandpass signal that was originally centered at ±fs/4 (one fourth the sample rate). I managed to obtain one such scheme that is computationally efficient, and it might be of some mild interest to you guys. The simple complex down-conversion scheme is shown in Figure 1(a).It works like this: say we have a real xR(n) input bandpass...
Correcting an Important Goertzel Filter Misconception
Recently I was on the Signal Processing Stack Exchange web site (a question and answer site for DSP people) and I read a posted question regarding Goertzel filters [1]. One of the subscribers posted a reply to the question by pointing interested readers to a Wikipedia web page discussing Goertzel filters [2]. I noticed the Wiki web site stated that a Goertzel filter:
"...is marginally stable and vulnerable tonumerical error accumulation when computed usinglow-precision arithmetic and...Instantaneous Frequency Measurement
I would like to talk about the oft used method of measuring the carrier frequency in the world of Signal Collection and Characterization world. It is an elegant technique because of its simplicity. But, of course, with simplicity, there come drawbacks (sometimes...especially with this one!).
In the world of Radar detection and characterization, one of the key characteristics of interest is the carrier frequency of the signal. If the radar is pulsed, you will have a very wide bandwidth, a...
