Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers
This final article in the series will look at -ve latency DSP and how it can be used to cancel the unwanted delays in sampled-data systems due to such factors as Nyquist filtering, ADC acquisition, DSP/FPGA algorithm computation time, DAC reconstruction and circuit propagation delays.
Some applications demand zero-latency or zero unwanted latency signal processing. Negative latency DSP may sound like the stuff of science fiction or broken physics but the arrangement as...
A Direct Digital Synthesizer with Arbitrary Modulus
Suppose you have a system with a 10 MHz sample clock, and you want to generate a sampled sinewave at any frequency below 5 MHz on 500 kHz spacing; i.e., 0.5, 1.0, 1.5, … MHz. In other words, f = k*fs/20, where k is an integer and fs is sample frequency. This article shows how to do this using a simple Direct Digital Synthesizer (DDS) with a look-up table that is at most 20 entries long. We’ll also demonstrate a Quadrature-output DDS. A note on...
Somewhat Off Topic: Deciphering Transistor Terminology
I recently learned something mildly interesting about transistors, so I thought I'd share my new knowledge with you folks. Figure 1 shows a p-n-p transistor comprising a small block of n-type semiconductor sandwiched between two blocks of p-type semiconductor.
The terminology of "emitter" and "collector" seems appropriate, but did you ever wonder why the semiconductor block in the center is called the "base"? The word base seems inappropriate because the definition of the word base is:...
Reducing IIR Filter Computational Workload
This blog describes a straightforward method to significantly reduce the number of necessary multiplies per input sample of traditional IIR lowpass and highpass digital filters.
Reducing IIR Filter Computations Using Dual-Path Allpass Filters
We can improve the computational speed of a lowpass or highpass IIR filter by converting that filter into a dual-path filter consisting of allpass filters as shown in Figure 1.
...A Lesson In Engineering Humility
Let's assume you were given the task to design and build the 12-channel telephone transmission system shown in Figure 1.
Figure 1
At a rate of 8000 samples/second, each telephone's audio signal is sampled and converted to a 7-bit binary sequence of pulses. The analog signals at Figure 1's nodes A, B, and C are presented in Figure 2.
Figure 2
I'm convinced that some of you subscribers to this dsprelated.com web site could accomplish such a design & build task....IIR Bandpass Filters Using Cascaded Biquads
In an earlier post [1], we implemented lowpass IIR filters using a cascade of second-order IIR filters, or biquads.
This post provides a Matlab function to do the same for Butterworth bandpass IIR filters. Compared to conventional implementations, bandpass filters based on biquads are less sensitive to coefficient quantization [2]. This becomes important when designing narrowband filters.
A biquad section block diagram using the Direct Form II structure [3,4] is...
Controlling a DSP Network's Gain: A Note For DSP Beginners
This blog briefly discusses a topic well-known to experienced DSP practitioners but may not be so well-known to DSP beginners. The topic is the proper way to control a digital network's gain. Digital Network Gain Control Figure 1 shows a collection of networks I've seen, in the literature of DSP, where strict gain control is implemented.
FIGURE 1. Examples of digital networks whose initial operations are input signal...
Generating Partially Correlated Random Variables
IntroductionIt is often useful to be able to generate two or more signals with specific cross-correlations. Or, more generally, we would like to specify an $\left(N \times N\right)$ covariance matrix, $\mathbf{R}_{xx}$, and generate $N$ signals which will produce this covariance matrix.
There are many applications in which this technique is useful. I discovered a version of this method while analysing radar systems, but the same approach can be used in a very wide range of...
Free Goodies from Embedded World - Full Inventory and Upcoming Draw Live-Streaming Date
Chances are that you already know that I went to Embedded World a few weeks ago and came back with a bag full of "goodies". Initially, my vision was to do a single draw for one person to win it all, but I didn't expect to come back with so much stuff and so many development kits. Based on your feedback, it seems like you guys agree that It wouldn't make sense for one person to win everything as no-one could make good use of all the boards and there would be lots of...
Angle Addition Formulas from Euler's Formula
Introduction
This is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT), but only indirectly. The main intent is to get someone who is uncomfortable with complex numbers a little more used to them and relate them back to already known Trigonometric relationships done in Real values. It is essentially a followup to my first blog article "The Exponential Nature of the Complex Unit Circle".
Polar CoordinatesThe more common way of...
Algebra's Laws of Powers and Roots: Handle With Care
Recently, for entertainment, I tried to solve a puzzling algebra problem featured on YouTube [1]. In due course I learned that algebra’s $$(a^x)^y=a^{xy}\qquad\qquad\qquad\qquad\qquad(1)$$
Law of Powers identity is not always valid (not always true) if variable a is real and exponents x and y are complex-valued.
The fact that Eq. (1) can’t reliably be used with complex x and y exponents surprised me. And then I thought, “Humm, …what other of algebra’s identities may also...
Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.
This part of the on-going series of articles looks at a variety of aspects concerning the FPGA device which provides the high-speed maths capability for the low-latency controller and the arbitrary circuit generator application. In due course a complete specification along with application examples will be maintained on the project website here.- Part 5: Some FPGA Aspects (this part)
- Part 4: Engineering of...
Fibonacci trick
I'm working on a video, tying the Fibonacci sequence into the general subject of difference equations.
Here's a fun trick: take any two consecutive numbers in the Fibonacci sequence, say 34 and 55. Now negate one and use them as the seed for the Fibonacci sequence, larger magnitude first, i.e.
$-55, 34, \cdots$
Carry it out, and you'll eventually get the Fibonacci sequence, or it's negative:
$-55, 34, -21, 13, -8, 5, -3, 2, -1, 1, 0, 1, 1 \cdots$
This is NOT a general property of difference...
Python scipy.signal IIR Filter Design
Introduction
The following is an introduction on how to design an infinite impulse response (IIR) filters using the Python scipy.signal package. This post, mainly, covers how to use the scipy.signal package and is not a thorough introduction to IIR filter design. For complete coverage of IIR filter design and structure see one of the references.
Filter SpecificationBefore providing some examples lets review the specifications for a filter design. A filter...
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
This will be my first time attending this show and I must say that I am excited. I am bringing with me my cameras and other video equipment with the intention to capture as much footage as possible and produce a (hopefully) fun to watch 'highlights' video. I will also try to film as many demos as possible and share them with you.
I enjoy going to shows like this one as it gives me the opportunity to get out of my home-office (from where I manage and run the *Related sites) and actually...
Fractional Delay FIR Filters
Consider the following Finite Impulse Response (FIR) coefficients:
b = [b0 b1 b2 b1 b0]
These coefficients form a 5-tap symmetrical FIR filter having constant group delay [1,2] over 0 to fs/2 of:
D = (ntaps – 1)/2 = 2 samples
For a symmetrical filter with an odd number of taps, the group delay is always an integer number of samples, while for one with an even number of taps, the group delay is always an integer + 0.5 samples. Can we design a filter...
Music/Audio Signal Processing
Greetings,
This is my blog from the point of view of a music/audio DSP research engineer / educator. It is informal and largely nontechnical because nearly everything I have to say about signal processing is (or will be) somewhere in my four-book series: Mathematics of DFT with Audio Applications, Introduction to Digital Filters, Physical Audio Signal Processing and
How the Cooley-Tukey FFT Algorithm Works | Part 1 - Repeating Calculations
The Fourier Transform is a powerful tool, used in many technologies, from audio processing to wireless communication. However, calculating the FT can be computationally expensive. The Cooley-Tukey Fast Fourier Transform (FFT) algorithm provides a significant speedup. It exploits the repetitive nature of calculations within the Discrete Fourier Transform (DFT), the mathematical foundation of the FT. By recognizing patterns in the DFT calculations and reusing intermediate results, the FFT vastly reduces the number of operations required. In this series of articles, we will look at how the Cooley-Tukey FFT algorithm works.
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
IIR Bandpass Filters Using Cascaded Biquads
In an earlier post [1], we implemented lowpass IIR filters using a cascade of second-order IIR filters, or biquads.
This post provides a Matlab function to do the same for Butterworth bandpass IIR filters. Compared to conventional implementations, bandpass filters based on biquads are less sensitive to coefficient quantization [2]. This becomes important when designing narrowband filters.
A biquad section block diagram using the Direct Form II structure [3,4] is...
Went 280km/h (174mph) in a Porsche Panamera in Germany!
Those of you who've been following my blog lately already know that I am going through some sort of mid-life crisis that involves going out there to meet people and make videos. It all started with Embedded World early this year, then continued at ESC Boston a couple of months ago and the latest chapter just concluded as I returned from Germany after spending a week at SEGGER's headquarters to produce a video to highlight their 25th anniversary.
Wavelets II - Vanishing Moments and Spectral Factorization
In the previous blog post I described the workings of the Fast Wavelet Transform (FWT) and how wavelets and filters are related. As promised, in this article we will see how to construct useful filters. Concretely, we will find a way to calculate the Daubechies filters, named after Ingrid Daubechies, who invented them and also laid much of the mathematical foundations for wavelet analysis.
Besides the content of the last post, you should be familiar with basic complex algebra, the...
Discrete-Time PLLs, Part 1: Basics
In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.
Setting the 3-dB Cutoff Frequency of an Exponential Averager
This blog discusses two ways to determine an exponential averager's weighting factor so that the averager has a given 3-dB cutoff frequency. Here we assume the reader is familiar with exponential averaging lowpass filters, also called a "leaky integrators", to reduce noise fluctuations that contaminate constant-amplitude signal measurements. Exponential averagers are useful because they allow us to implement lowpass filtering at a low computational workload per output sample.
Figure 1 shows...
Spread the Word and Run a Chance to Win a Bundle of Goodies from Embedded World
Do you have a Twitter and/or Linkedin account?
If you do, please consider paying close attention for the next few days to the EmbeddedRelated Twitter account and to my personal Linkedin account (feel free to connect). This is where I will be posting lots of updates about how the EmbeddedRelated.tv live streaming experience is going at Embedded World.
The most successful this live broadcasting experience will be, the better the chances that I will be able to do it...
Ten Little Algorithms, Part 6: Green’s Theorem and Swept-Area Detection
Other articles in this series:
- Part 1: Russian Peasant Multiplication
- Part 2: The Single-Pole Low-Pass Filter
- Part 3: Welford's Method (And Friends)
- Part 4: Topological Sort
- Part 5: Quadratic Extremum Interpolation and Chandrupatla's Method
This article is mainly an excuse to scribble down some cryptic-looking mathematics — Don’t panic! Close your eyes and scroll down if you feel nauseous — and...
Using Mason's Rule to Analyze DSP Networks
There have been times when I wanted to determine the z-domain transfer function of some discrete network, but my algebra skills failed me. Some time ago I learned Mason's Rule, which helped me solve my problems. If you're willing to learn the steps in using Mason's Rule, it has the power of George Foreman's right hand in solving network analysis problems.
This blog discusses a valuable analysis method (well known to our analog control system engineering brethren) to obtain the z-domain...
The DSP Online Conference - Right Around the Corner!
It is Sunday night as I write this blog post with a few days to go before the virtual doors of the very first DSP Online Conference open..
It all started with a post in the DSPRelated forum about three months ago. We had just had a blast running the 2020 Embedded Online Conference and we thought it could be fun to organize a smaller event dedicated to the DSP community. So my goal with the post in the forum was to see if...
Design a DAC sinx/x Corrector
This post provides a Matlab function that designs linear-phase FIR sinx/x correctors. It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.
A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process. In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses. These are converted by the DAC into contiguous pulses...
Two jobs
For those of you following closely embeddedrelated and the other related sites, you might have noticed that I have been less active for the last couple of months, and I will use this blog post to explain why. The main reason is that I got myself involved into a project that ended up using a better part of my cpu than I originally thought it would.
edit - video of the event:
I currently have two jobs: one as an electrical/dsp engineer recycled as a web publisher and the other...
