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A poor man's Simulink

Markus NentwigMarkus Nentwig ● January 24, 2015●3 comments

Markus Nentwig built a compact glue layer that embeds NGSPICE into Octave to cosimulate continuous-time circuits and digital control. The article walks through an RC lowpass example, the MEX-based Octave interface, and the breakpoint-driven cosimulation flow, showing how adaptive SPICE integration handles asynchronous and time-triggered events. It presents a practical, low-cost alternative to Simulink for tightly coupled analog-digital system design.


Spline interpolation

Markus NentwigMarkus Nentwig ● May 11, 2014●7 comments

Markus Nentwig provides a cookbook for segmented cubic spline interpolation that turns scattered or noisy data into efficient fixed-point functions. The article shows how to build third-order polynomial segments with explicit value and slope control via basis functions, solve scaling factors by least-squares in Octave/Matlab, and export coefficients for Verilog RTL evaluation using the Horner scheme and practical fixed-point tips.


Signed serial-/parallel multiplication

Markus NentwigMarkus Nentwig ● February 16, 2014

Struggling with costly wide adders for signed multiplication on FPGAs? Markus Nentwig unpacks a neat bit-level trick that turns two's-complement signed-signed multiplication into a serial-parallel routine using only a one-bit wider adder. Learn how flipping sign bits and a small, controlled constant cancel lets you avoid full sign-extension, and get a parametrized Verilog RTL plus synthesis notes to try it yourself.


Shared-multiplier polyphase FIR filter

Markus NentwigMarkus Nentwig ● July 31, 2013●7 comments

One multiplier and a dual-port RAM can implement an arbitrary m/n polyphase FIR resampler on an FPGA, Markus Nentwig demonstrates. The post focuses on practical implementation details, including a parametrized Verilog design, pipelined MAC control, and a Matlab testbench for verification. It shows how bank indexing and pipeline delay compensation let you multiplex many coefficient banks efficiently for resource-constrained FPGA designs.


Noise shaping

Markus NentwigMarkus Nentwig ● December 9, 2012●3 comments

Markus Nentwig presents a compact, practical introduction to noise shaping by treating quantization error as the first sample of a designed impulse response. He shows how to derive a noise shaper from a target spectrum, demonstrates the tradeoff between in-band noise reduction and total noise increase, and includes a Matlab example while highlighting clipping and stability caveats for sigma-delta contexts.


'z' as in 'Zorro': Frequency Masking FIR

Markus NentwigMarkus Nentwig ● October 2, 2012

Markus Nentwig shows an efficient way to build steep wideband FIR filters by combining upsampled and complementary stages, then masking their spectra. He provides a Matlab and Octave design program that uses a generic least-squares optimizer to place coefficients, letting you explore filter sizes and oversampling while cutting computational cost significantly compared to a conventional symmetric FIR.


FIR sideways (interpolator polyphase decomposition)

Markus NentwigMarkus Nentwig ● September 12, 2012●9 comments

Markus Nentwig presents a compact way to implement a symmetric FIR interpolator by rethinking the usual tapped delay line. The 1:3 polyphase example uses separate delay lines per coefficient to skip multiplies on known zeros and exploit symmetry, cutting multiplications substantially; a Matlab/Octave demo and notes on ASIC-friendly implementation are included to help evaluate real-world cost tradeoffs.


Design of an anti-aliasing filter for a DAC

Markus NentwigMarkus Nentwig ● August 18, 2012

If you need a practical way to design an anti-aliasing filter for a DAC, this post delivers an Octave/Matlab script that numerically optimizes a Laplace-domain transfer function for linear phase and arbitrary magnitude. The routine models the DAC sample-and-hold sinc response, compensates group delay automatically, and can include an optional multiplierless FIR equalizer. An example shows a 5.4 dB objective improvement and reduced analog Q for easier implementation.


TCP/IP interface (Matlab/Octave)

Markus NentwigMarkus Nentwig ● June 17, 2012●10 comments

Markus Nentwig supplies a compact set of mex C functions that let you control Ethernet-enabled measurement instruments directly from Matlab or Octave on Windows. The code opens raw TCP/IP sockets, sends SCPI commands, and handles ASCII and binary replies including binary-length headers. It intentionally avoids instrument-control toolboxes and timeouts for simplicity, and includes instrIf_socket, instrIf_write, instrIf_read and instrIf_close with simple usage examples.


Weighted least-squares FIR with shared coefficients

Markus NentwigMarkus Nentwig ● May 23, 2012

Markus Nentwig demonstrates how to design FIR filters that share coefficients across delay taps, allowing multiplier reuse and reduced implementation cost. He reimplements Lawson's iterative reweighted least-squares for complex-valued FIRs and provides Matlab/Octave code you can adapt for nonstandard constraints. The post explains iteration weight logic, the Toeplitz special-case with Levinson-Durbin, and practical trade-offs between multiplier count and stopband performance.


Delay estimation by FFT

Markus NentwigMarkus Nentwig ● September 22, 2007●50 comments

Markus Nentwig presents a practical FFT-based algorithm to estimate and correct integer and fractional sample delays between two signals, returning a scaled, aligned replica and delay estimate. The method combines coarse cross-correlation with a phase-slope linear regression on weighted spectra to achieve subsample timing accuracy. The article also discusses accuracy limits, phase-unwrapping pitfalls, and how to use the error-vector spectrum to reveal distortion in lab measurements.


Polyphase filter / Farrows interpolation

Markus NentwigMarkus Nentwig ● September 18, 2007●14 comments

Markus Nentwig shows how polyphase filtering and the Farrow interpolator provide a practical, computation‑efficient way to realize sub-sample delays and variable resampling. He starts from the upsample-filter-decimate view, explains how polyphase decomposition reduces per-phase work, then describes how the Farrow structure fits polynomials to coefficient banks for continuous fractional-delay control. The post includes warnings about filter choices and links to code and references.


Noise shaping

Markus NentwigMarkus Nentwig ● December 9, 2012●3 comments

Markus Nentwig presents a compact, practical introduction to noise shaping by treating quantization error as the first sample of a designed impulse response. He shows how to derive a noise shaper from a target spectrum, demonstrates the tradeoff between in-band noise reduction and total noise increase, and includes a Matlab example while highlighting clipping and stability caveats for sigma-delta contexts.


A poor man's Simulink

Markus NentwigMarkus Nentwig ● January 24, 2015●3 comments

Markus Nentwig built a compact glue layer that embeds NGSPICE into Octave to cosimulate continuous-time circuits and digital control. The article walks through an RC lowpass example, the MEX-based Octave interface, and the breakpoint-driven cosimulation flow, showing how adaptive SPICE integration handles asynchronous and time-triggered events. It presents a practical, low-cost alternative to Simulink for tightly coupled analog-digital system design.


Signed serial-/parallel multiplication

Markus NentwigMarkus Nentwig ● February 16, 2014

Struggling with costly wide adders for signed multiplication on FPGAs? Markus Nentwig unpacks a neat bit-level trick that turns two's-complement signed-signed multiplication into a serial-parallel routine using only a one-bit wider adder. Learn how flipping sign bits and a small, controlled constant cancel lets you avoid full sign-extension, and get a parametrized Verilog RTL plus synthesis notes to try it yourself.


Shared-multiplier polyphase FIR filter

Markus NentwigMarkus Nentwig ● July 31, 2013●7 comments

One multiplier and a dual-port RAM can implement an arbitrary m/n polyphase FIR resampler on an FPGA, Markus Nentwig demonstrates. The post focuses on practical implementation details, including a parametrized Verilog design, pipelined MAC control, and a Matlab testbench for verification. It shows how bank indexing and pipeline delay compensation let you multiplex many coefficient banks efficiently for resource-constrained FPGA designs.


TCP/IP interface (Matlab/Octave)

Markus NentwigMarkus Nentwig ● June 17, 2012●10 comments

Markus Nentwig supplies a compact set of mex C functions that let you control Ethernet-enabled measurement instruments directly from Matlab or Octave on Windows. The code opens raw TCP/IP sockets, sends SCPI commands, and handles ASCII and binary replies including binary-length headers. It intentionally avoids instrument-control toolboxes and timeouts for simplicity, and includes instrIf_socket, instrIf_write, instrIf_read and instrIf_close with simple usage examples.


Understanding Radio Frequency Distortion

Markus NentwigMarkus Nentwig ● September 26, 2010●2 comments

Markus Nentwig breaks down how analog RF nonlinearities appear in a complex baseband model so you can simulate and predistort real transmitters. The article shows that even-order terms vanish in-band under narrowband assumptions, while odd-order products collapse to |BB(t)|^(n-1) BB(t) and do not depend on the carrier frequency. It also explains bandwidth scaling and includes a MATLAB example plus measured PA coefficients.


Spline interpolation

Markus NentwigMarkus Nentwig ● May 11, 2014●7 comments

Markus Nentwig provides a cookbook for segmented cubic spline interpolation that turns scattered or noisy data into efficient fixed-point functions. The article shows how to build third-order polynomial segments with explicit value and slope control via basis functions, solve scaling factors by least-squares in Octave/Matlab, and export coefficients for Verilog RTL evaluation using the Horner scheme and practical fixed-point tips.


Design of an anti-aliasing filter for a DAC

Markus NentwigMarkus Nentwig ● August 18, 2012

If you need a practical way to design an anti-aliasing filter for a DAC, this post delivers an Octave/Matlab script that numerically optimizes a Laplace-domain transfer function for linear phase and arbitrary magnitude. The routine models the DAC sample-and-hold sinc response, compensates group delay automatically, and can include an optional multiplierless FIR equalizer. An example shows a 5.4 dB objective improvement and reduced analog Q for easier implementation.