For engineers implementing DSP functions on FPGAs. This is a NEW Group that has just been created. It should take a few weeks before the group is big enough to become active. Please join!
Hi everyone, I am evaluating a wireless receiver solution, cound you give me some advise? the bandwidth of signal is about 64Mhz, if choose 4x smapling rate, which center frequecy of band siganl should be before AD converter ? and the 256MB/s data will be sent to FPGA, I have no ideal whether there are a FPGA product is competent for DDC and filter. Great thanks Peter