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Discussion Groups | TMS320C6x | the local memory inside DM642 and DM6446

Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).

  

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the local memory inside DM642 and DM6446 - ZhouXiao - Oct 9 9:04:33 2008



dear all,
 
as i know, the local memory inside DM642 and DAVINCI DM6446 can be set to be cache or to be
local SRAM.
 
i want to if set to be local SRAM, is this SRAM single-ported or dual-ported?
 
actually, i am just curious about whether the external DMA engine and processor core can access
this local SRAM simultaneously, i.e., if DMA engine and processor core acess the local SRAM
simultaneously but with different address, will one of them defer the access from the other?  
e.g., during DMA engine is accessing the local SRAM, if processor issue a data access
instruction which targets this local SRAM, the pipeline will be stalled until DMA engine
release the memory control?

any reply is apprepriated!
 
br,
zhouxiao
 
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