Hi, all:

I encountered an annoying problem on SCI module(c2000 F2812) in my
project.Iused SCIb to send and receive message. Well when I sending
the message I
turned the RX off(RXENA=0), after sending finishes, the RX is turned on to
receive some feedback.I noticed that the RX state register RXST shows frame
error(FE=1) before the sending finished, but the RX is turned off at this
moment.  This is very strange when I use SCIB, while SCIA there is no such
problem.  The message I received is 0x8000, that means the SCIFFFE is '1',
is frame error too.

I have already checked the signal on the pin. The RX has signals.

Could anyone give me some suggestion?

Best Wishes
Yichao

Hi:
Thank you for your help

my project is to use f2812 controlling several robot
joints.Thecommunication is RS485. so special circuits are required.

After the joint received the message from 2812, it will send feedback after
1ms.

Now, the joint can receive message(That prove f2812 sci sending is ok,
correct baud rate,correct message format, and should be correct circuit
configuration). From the oscillograph, I can see the joint send feedback
,and on the 2812 scib RX pin there
arrives the signal(that proves the 485-232 chip works well, and signal
arrived is correct) . the problem is 2812 cannot receive the Feedback. the
SCIRXBUF is 0x8000, that means frame error. So I don't know how to handle it
.

I use FIFO is just want to see whether some message arrives, without FIFO
the RX still cannot receive correct message, I even didn't use any
interruption
I pick serveral important part of my codes as follow:

    GpioMuxRegs.GPGMUX.bit.SCIRXDB_GPIOG5 = 1;
    GpioMuxRegs.GPGMUX.bit.SCITXDB_GPIOG4 = 1;
    GpioMuxRegs.GPGDIR.bit.GPIOG4=1;
    GpioMuxRegs.GPGDIR.bit.GPIOG5=0;//define the io to use SCIB RX TX .

    PieCtrl.PIEIER9.bit.INTx3 = 0;
    PieCtrl.PIEIER9.bit.INTx4 = 0;//I close the TX and RX interruption
    ScibRegs.SCIFFTX.all=0xE000;
    ScibRegs.SCIFFRX.bit.RXFFIENA=0;
    ScibRegs.SCIFFRX.bit.RXFIFORESET=1;
//    PieCtrl.PIEIER9.bit.INTx3 = 0;//RXB interrupt close, actually,I didn't
use interrupt

    ScibRegs.SCICTL1.bit.RXENA=0;// close the RX to avoid problem, although
not very necessary
    DXL_SEND_ENABLE();   //enable 485 send

    for(bCount=0;bCount<bPacketLength;bCount++)
    {

        Txb(gbpTxBuffer[bCount]);
        //what puzzled me is when I send several packet here,I find RXST
shows frame error(FE=1)
    }
    while(!ScibRegs.SCICTL2.bit.TXEMPTY); //wait until TX shift register
empty.
                        //As you mentioned, wait till shift register clear
    DXL_RECEIVE_ENABLE();  //enable 485 receive
    ScibRegs.SCICTL1.bit.RXENA=1;         // open the RX
//    PieCtrl.PIEIER9.bit.INTx3 = 1;//RXB interrupt open

-------------------------------------------------------------------------
void Txb(BYTE bTxbData)
{
    while(!TXB_READY);
    ScibRegs.SCITXBUF=bTxbData;

}
On Jan 23, 2008 9:34 PM, Jan Humpl <h...@poll.cz> wrote:

> Hi,
>   I don't understand your explanation. How do you detect Tx stop? Do
> you use Tx fifo or not? Mention that if you use fifo, than you can't
> detect Tx stop, you can just detect Tx fifo empty (TXFFINT), but last
> byte is still in shift register. If you enables Rx in TXFFINT isr, than
> Rx can start during sending last byte and the result is frame error.
> There are two ways how to workaround this:
>
> 1. you can enable Rx during Tx and ignore own bytes
>
> OR
>
> 2. you can disable tx fifo in TXFFINT isr and set up an TXEMPTY
> interrupt. In TXEMPTY isr you can reenable Rx. Before sending next
> message, you can reenable fifo.
>
> If you don't use fifo, I have no idea. Please send more information
> about your problem if you still need a help.
>
> JkH
>
> --
> Ing. Jan Humpl
> vývojový pracovník / development engineer
> tel.: (+420) 251 115 266, (+420) 777 343 884
> fax: (+420) 251 115 255
> e-mail: h...@poll.cz
> http://www.poll.cz
>
> POLL, s.r.o.
> Køí¾ová 3/3132, 150 00  Praha 5
>
>
> Zhang Yichao napsal(a):
> >
> >
> > Hi, all:
> >
> > I encountered an annoying problem on SCI module(c2000 F2812) in my
> > project.I used SCIb to send and receive message. Well when I sending the
> > message I turned the RX off(RXENA=0), after sending finishes, the RX is
> > turned on to receive some feedback.I noticed that the RX state register
> > RXST shows frame error(FE=1) before the sending finished, but the RX is
> > turned off at this moment.  This is very strange when I use SCIB, while
> > SCIA there is no such problem.  The message I received is 0x8000, that
> > means the SCIFFFE is '1', is frame error too.
> >
> > I have already checked the signal on the pin. The RX has signals.
> >
> > Could anyone give me some suggestion?
> >
> > Best Wishes
> > Yichao
> >
> > 
>

Hi,
   I don't understand your explanation. How do you detect Tx stop? Do 
you use Tx fifo or not? Mention that if you use fifo, than you can't 
detect Tx stop, you can just detect Tx fifo empty (TXFFINT), but last 
byte is still in shift register. If you enables Rx in TXFFINT isr, than 
Rx can start during sending last byte and the result is frame error. 
There are two ways how to workaround this:

1. you can enable Rx during Tx and ignore own bytes

OR

2. you can disable tx fifo in TXFFINT isr and set up an TXEMPTY 
interrupt. In TXEMPTY isr you can reenable Rx. Before sending next 
message, you can reenable fifo.

If you don't use fifo, I have no idea. Please send more information 
about your problem if you still need a help.

JkH

--
Ing. Jan Humpl
vývojový pracovník / development engineer
tel.: (+420) 251 115 266, (+420) 777 343 884
fax: (+420) 251 115 255
e-mail: h...@poll.cz
http://www.poll.cz

POLL, s.r.o.
Křížová 3/3132, 150 00  Praha 5
Zhang Yichao napsal(a):
> Hi, all:
> 
> I encountered an annoying problem on SCI module(c2000 F2812) in my 
> project.I used SCIb to send and receive message. Well when I sending the 
> message I turned the RX off(RXENA=0), after sending finishes, the RX is 
> turned on to receive some feedback.I noticed that the RX state register 
> RXST shows frame error(FE=1) before the sending finished, but the RX is 
> turned off at this moment.  This is very strange when I use SCIB, while 
> SCIA there is no such problem.  The message I received is 0x8000, that 
> means the SCIFFFE is '1', is frame error too.
> 
> I have already checked the signal on the pin. The RX has signals.
> 
> Could anyone give me some suggestion?
> 
> Best Wishes
> Yichao
Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Transcoding Solution
for Commercial & Consumer End Equipment: www.ti.com/dm6467

You can post a message or access and search the archives of this group on DSPRelated.com:
http://www.dsprelated.com/groups/c28x/1.php

_____________________________________

 

Your code looks OK.

But, if your code still don't work try this algorithm:

test TXFFINT flag until it is not set
disable TX FIFO
test TXEMPTY

I got similar problems with F2808. I found that TXEMPTY flag doesn't 
work correctly when you use TX FIFO. Try to disable FIFO before the flag 
test.

JkH.

--
Ing. Jan Humpl
vývojový pracovník / development engineer
tel.: (+420) 251 115 266, (+420) 777 343 884
fax: (+420) 251 115 255
e-mail: h...@poll.cz
http://www.poll.cz

POLL, s.r.o.
Køí¾ová 3/3132, 150 00  Praha 5
Zhang Yichao napsal(a):
> Hi:
> Thank you for your help
> 
> my project is to use f2812 controlling several robot joints.The 
> communication is RS485. so special circuits are required.
> 
> After the joint received the message from 2812, it will send feedback 
> after 1ms.
> 
> Now, the joint can receive message(That prove f2812 sci sending is ok, 
> correct baud rate,correct message format, and should be correct circuit 
> configuration). From the oscillograph, I can see the joint send feedback 
> ,and on the 2812 scib RX pin there
> arrives the signal(that proves the 485-232 chip works well, and signal 
> arrived is correct) . the problem is 2812 cannot receive the Feedback. 
> the SCIRXBUF is 0x8000, that means frame error. So I don't know how to 
> handle it .
> 
> I use FIFO is just want to see whether some message arrives, without 
> FIFO the RX still cannot receive correct message, I even didn't use any 
> interruption
> I pick serveral important part of my codes as follow:
> 
>     GpioMuxRegs.GPGMUX.bit.SCIRXDB_GPIOG5 = 1;
>     GpioMuxRegs.GPGMUX.bit.SCITXDB_GPIOG4 = 1;
>     GpioMuxRegs.GPGDIR.bit.GPIOG4=1;
>     GpioMuxRegs.GPGDIR.bit.GPIOG5=0;//define the io to use SCIB RX TX .
> 
>     PieCtrl.PIEIER9.bit.INTx3 = 0;
>     PieCtrl.PIEIER9.bit.INTx4 = 0;//I close the TX and RX interruption
>     ScibRegs.SCIFFTX.all=0xE000;
>     ScibRegs.SCIFFRX.bit.RXFFIENA=0;
>     ScibRegs.SCIFFRX.bit.RXFIFORESET=1 ;
> //    PieCtrl.PIEIER9.bit.INTx3 = 0;//RXB interrupt close, actually,I 
> didn't use interrupt
> 
>     ScibRegs.SCICTL1.bit.RXENA=0;// close the RX to avoid problem, 
> although not very necessary
>     DXL_SEND_ENABLE();   //enable 485 send
> 
>     for(bCount=0;bCount<bPacketLength;bCount++)
>     {
> 
>         Txb(gbpTxBuffer[bCount]);
>         //what puzzled me is when I send several packet here,I find RXST 
> shows frame error(FE=1)
>     }
>     while(!ScibRegs.SCICTL2.bit.TXEMPTY); //wait until TX shift register 
> empty.
>                         //As you mentioned, wait till shift register clear
>     DXL_RECEIVE_ENABLE();  //enable 485 receive
>     ScibRegs.SCICTL1.bit.RXENA=1;         // open the RX
> //    PieCtrl.PIEIER9.bit.INTx3 = 1;//RXB interrupt open
> 
> -------------------------------------------------------------------------
> void Txb(BYTE bTxbData)
> {
>     while(!TXB_READY);
>     ScibRegs.SCITXBUF=bTxbData;
> 
> }
> 
> On Jan 23, 2008 9:34 PM, Jan Humpl <h...@poll.cz 
> <mailto:h...@poll.cz>> wrote:
> 
>     Hi,
>       I don't understand your explanation. How do you detect Tx stop? Do
>     you use Tx fifo or not? Mention that if you use fifo, than you can't
>     detect Tx stop, you can just detect Tx fifo empty (TXFFINT), but last
>     byte is still in shift register. If you enables Rx in TXFFINT isr, than
>     Rx can start during sending last byte and the result is frame error.
>     There are two ways how to workaround this:
> 
>     1. you can enable Rx during Tx and ignore own bytes
> 
>     OR
> 
>     2. you can disable tx fifo in TXFFINT isr and set up an TXEMPTY
>     interrupt. In TXEMPTY isr you can reenable Rx. Before sending next
>     message, you can reenable fifo.
> 
>     If you don't use fifo, I have no idea. Please send more information
>     about your problem if you still need a help.
> 
>     JkH
> 
>     --
>     Ing. Jan Humpl
>     vývojový pracovník / development engineer
>     tel.: (+420) 251 115 266, (+420) 777 343 884
>     fax: (+420) 251 115 255
>     e-mail: h...@poll.cz <mailto:h...@poll.cz>
>     http://www.poll.cz
> 
>     POLL, s.r.o .
>     Køí¾ová 3/3132, 150 00  Praha 5
>     Zhang Yichao napsal(a):
>      >
>      >
>      > Hi, all:
>      >
>      > I encountered an annoying problem on SCI module(c2000 F2812) in my
>      > project.I used SCIb to send and receive message. Well when I
>     sending the
>      > message I turned the RX off(RXENA=0), after sending finishes, the
>     RX is
>      > turned on to receive some feedback.I noticed that the RX state
>     register
>      > RXST shows frame error(FE=1) before the sending finished, but the
>     RX is
>      > turned off at this moment.  This is very strange when I use SCIB,
>     while
>      > SCIA there is no such problem.  The message I received is 0x8000,
>     that
>      > means the SCIFFFE is '1', is frame error too.
>      >
>      > I have already checked the signal on the pin. The RX has signals.
>      >
>      > Could anyone give me some suggestion?
>      >
>      > Best Wishes
>      > Yichao
>      >
>      > 
Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Transcoding Solution
for Commercial & Consumer End Equipment: www.ti.com/dm6467

You can post a message or access and search the archives of this group on DSPRelated.com:
http://www.dsprelated.com/groups/c28x/1.php

_____________________________________