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Use DSP to implement fractional N PLL

Hi all, I have an integer PLL and DSP in my system, I want fine resolution (a fraction of the PLL step size). Is possible to just use the DSP to adjust the reference frequency instead of using a fractional-N PLL chip? Thanks Guang ...

interaction between bandpass equalizer and pll

Hi, When using the SG algorithm for equalizing, the error signal is computed at the end of the pll. My problem is that the pll cannot be locked before the channel is reasonably equalized. Thus, I have a "bootstrap" where the equalizer need phase information(from pll) and the pll need equalized sign...

interaction between bandpass equalizer and pll

Hi, When using the SG algorithm for equalizing, the error signal is computed at the end of the pll. My problem is that the pll cannot be locked before the channel is reasonably equalized. Thus, I have a "bootstrap" where the equalizer need phase information(from pll) and the pll need equalized sign...

MSK demodulation using PLL

Can I implement a MSK demodulator using PLL? Basically I want to demodulate MSK using FM demodulator IC. The IC uses a PLL for FM demodulation. What are the drawbacks in using PLL ( if I can use one ) as compared to coherent demodulator with carrier recovery? Thanks ~ Kaushal ...

Coherent vs Noncoherent GFSK Demodulation

Hi, I've been working on demodulation of low-deviation GFSK signals similar to Bluetooth, with h=0.3 and BT=0.5. I have two simulations, one using a discriminator plus integrate and dump, and another with a second order PLL. I am computing BER vs Eb/No for each case. In the PLL case, I expect...

Re: Software PLL (SPLL)

Tim Wescott wrote: > Implementing a PLL in software uses the same basic theory as > implementing a PLL in hardware -- you compare your synthesized signal to > a reference, generate a phase difference, then servo the frequency of > your synthesized signal to your reference. Why? Isn't a s...

Discrete time PLL (Digital PLL, DPLL)

comp.dsp, I need a robust*, free discrete time PLL algorithm, and I haven't had much luck searching the net. Pointers anyone? TIA, Emanuel Landeholm *Must work with reasonably non-sinusoidal signals (harmonic distortion) and reasonably aliased (inharmonic distortion, pseudo periodi...

Re: Software PLL (SPLL)

Ron N. wrote: > Tim Wescott wrote: > > > Implementing a PLL in software uses the same basic theory as > > implementing a PLL in hardware -- you compare your synthesized signal to > > a reference, generate a phase difference, then servo the frequency of > > your synthesized signal to your re...

Re: Software PLL (SPLL)

Terry Given wrote: > Ron N. wrote: > > Tim Wescott wrote: > > > Implementing a PLL in software uses the same basic theory as > > > implementing a PLL in hardware -- you compare your synthesized signal to > > > a reference, generate a phase difference, then servo the frequency of > > > y...

I-Q vs PLLs

Which gives best performance, a Phase-locked-loop (say all digital - software) or I-Q (ie using arctan and then differentiating) demodulation.Reason I am asking is that a PLL is supposed to be the best - is it better than just the pure number crunching.It woudl appear to me that when you differe...

Re: Software PLL (SPLL)

In article , Ron N. wrote: > Tim Wescott wrote: > > Implementing a PLL in software uses the same basic theory as > > implementing a PLL in hardware -- you compare your synthesized signal to > > a reference, generate a phase difference, then servo the frequency of > > your synthesized ...

Re: Software PLL (SPLL)

Ron N. wrote: > Terry Given wrote: > > > Ron N. wrote: > > > > > Tim Wescott wrote: > > > > > > > Implementing a PLL in software uses the same basic theory as > > > > implementing a PLL in hardware -- you compare your synthesized signal to > > > > a reference, generate a phase differen...

Digital PLL and FM demodulation

Hello, PLL is a good way to do FM demodulation in analogue domain. What about its use in digital domain? Why not to use a digital PLL to do FM demodulation? what is advantages(if any) and disadvantages of this technique? Regards ...

implementation of PLL

Dear Prof.Wolfgang Thank for your reply about PLL and your suggestions are very good and implementation can be possible.Please suggest what you answer " apply MAC operation to voltage using sin-table" jkm ...

PLL to generate low frequencies

Hi, This is my first post to this forum. I have a reference oscillator of 12.7 MhZ, how do I generate the following frequencies using this oscillator 16.863406408094434 Hz 16.722408026755854 16.694490818030051 13.755158184319120 12.562814070351759 12.531328320802006 12.062...

Re: Software PLL (SPLL)

Ken Smith wrote: > In article , > Ron N. wrote: > > Tim Wescott wrote: > > > Implementing a PLL in software uses the same basic theory as > > > implementing a PLL in hardware -- you compare your synthesized signal to > > > a reference, generate a phase difference, then servo the ...

urgent..c code to implement PLL

hi all, as my project submission date is fast approaching i need c (not c++) code to implement PHASE LOCKED LOOP (PLL) and to plot output graphs..please take the pains to reply this messege with code or even location where can i get that. thanx Patro ...

PLL and AFC

PLL is Phase Lock Loop, while AFC is Automatic Frequency Control. Anyone in the group knows what is the difference between these 2 systems, since both are considered as frequency tracking system for transciever? Why in some application we have to choose AFC? THX a lot. ...

Discrete time PLL - mean time between slips

Hi guys, Can anyone point me to a paper/book describing the analysis of the discrete time PLL? All I could find are books describing the nonlinear analysis of the continuous time PLL -- an analysis that is based on nonlinear differential equations. A discrete time analysis avoids the dif...

FM demod using PLL

I am looking for an example of using a software pll for demod of FM. I tried the other fm demod routines (arctan, differentiator) and think there could be an improvement using a software pll. I found some matlab code posted by Tom ? that works on his data (generated by matlab) but fails on mi...

PLL - quadrature output

Hi Does PLL have a property that under locked state, the output is in quadrature with the reference input ? I know that this is true if the phase detector is of multiplier/mixer type ( using the approximation sin E ~ E for error E. ) I am asking whether the above property is t...

implementation of PLL

I am a research scholar working in Power System related to Power Electronics devices. In my work I have to use PLL through assembly langeage programming (by TMS320LF2407A EVM board in Code Composer 2000 environment) for detecting the instantanous frequency of a 3ph transmission line. any one can...

Re: Software PLL (SPLL)

Terry Given wrote: > Ron N. wrote: > > Terry Given wrote: > > > > > Ron N. wrote: > > > > > > > Tim Wescott wrote: > > > > > > > > > Implementing a PLL in software uses the same basic theory as > > > > > implementing a PLL in hardware -- you compare your synthesized signal to ...

CS8420 (again ;) )

Hi everybody There has been some advice and answers about this old chip, but I would still appreciate some help with a precise functionality it : I must use the CS8420 in a new design in software control mode (to allow writing to the U-block buffer) with an FPGA and I must allow the users to pl...

Premodulation filter/PLL loop filter

Mayby not the right group, but.. On my bench, I have created an ad-hoc signal generator to drive some old paging receiver boards. I am using a DDS to generate phase-continuous, 4-level FSK. I'm then "multiplying" the output of the DDS (using a PLL/VCO module) by 11, creating an RF carrier...

Digital phase/frequency detector

There is a software PLL with a hardware phase detector. The phase detector is done in that way so it outputs the phase difference (+/- Pi) and the absolute frequency difference at the same time. What could be the best use for the phase and the frequency information in the PLL ? It is desired to ...

Re: Software PLL (SPLL)

Ron N. wrote: > Terry Given wrote: > > Ron N. wrote: > > > Terry Given wrote: > > > > > > > Ron N. wrote: > > > > > > > > > Tim Wescott wrote: > > > > > > > > > > > Implementing a PLL in software uses the same basic theory as > > > > > > implementing a PLL in hardw...

QPSK carrier recovery problems

Hi all !!! I am newbie to signal processing and I have to make QPSK modem. Here are some basic parameters of this system: - sampling frequency 18.5kHz - carrier frequency 1.85kHz; carrier is synchronous with sampling frequency - symbol rate 1.85kS/s; every symbol starts with the same carrier ...

Spectral Shaping using a PLL Loop Filter

Sorry to revisit this.. I'm trying (again) to directly generate an 930MHz FSK signal. My "baseband" is a NRZ square wave switching the profile pin on a DDS. I'm then multiplying the DSS output with a PLL/VCO to generate a 930MHz carrier. For simplicity, I want to use the PLL loop filter ...

Re: speed problem on tms320f2812

I think the witch has cast a spell on your code. Put a scope on the XCLKOUT line and see what you are reading for the clock out signal. I believe the default value, unless you have changed the registers, is for the clockout to be 1/4 the SYSCLK (PLL multiplied clock in). Early on in my devel...

Frequency response of a PLL. What does it convey

The "frequency response of a PLL" is plotted as angle_at_vco_output(s)/angle_of_input_wavefom(s) = a classical 2nd order system described by a the "s" transform, where s = jw. Where w is in radians. So what does a plot of this convey. I've read in places that we can interpret the response a...

carrier recovery in software using PLL

Hello all! I want to implement QPSK modulation in software. But i know that QPSK signals can only be detected coherently. i.e knowledge of the carrier frequency and phase is mandatory for correct detection. How is possible to recover the carrier synchronization in software? Is it possible to implem...

Re: Approach to demodulating AM-signals?

Hello Tam, > > If you want the best AM demodulation then you need to recover the carrier > via squaring then lock into twice the carrier freq using a PLL. Then divide > this freq by 2 and multiply and filter times the original AM. Synchronous AM > demodulation - you don't need a proces...

Re: Need help on video decoder chip specification

Steve wrote: > I need help in understanding a group of video decoder chip > specifications. Let me use TI's TVP5146 as an example. The first thing > I want to know is the output digital data rate. On the spec, it says: > Four 10-bit, 30-MSPS A/D converters with analog preprocessors...

Re: Software PLL (SPLL)

In article , Ron N. wrote: > Mark wrote: > > > A software PLL is based on an NCO and an NCO unlike a VCO has a minimum > > step size so it can only achieve a number of discrete frequencies, i.e. > > the output frequency is quantized. > > Why do you say this? Perhaps because this...

Re: reconstruction filter

maxascent wrote: > I can give you a bit more info regarding the system. I am sampling at 50MHz > for a max frequency of 20MHz and generating a sine wave. I need such a high > order filter to enable me to achieve -70dBc. This does not seem to be a good design. The DDS ICs allowing for ...

Re: FM Demodulator

"john" wrote in message news:1133647657.981006.108970@g49g2000cwa.googlegroups.com... > > Cockney_Wanker wrote: > > "Vladimir Vassilevsky" wrote in message > > news:XGmkf.26215$7h7.5662@newssvr21.news.prodigy.com... > > > > > > > > > Real_McCoy wrote: > > > > > ...

Re: Uniqueness of Sinusoidal waves

"Jerry Avins" wrote in message news:_8udnVrBE_vGv_rfRVn-pw@rcn.net... > Sandeep Chikkerur wrote: > > ... > > > What is a frequency synthesizer ? The one whose output frequency is > > some factor of input frequency which will not be same as the input > > frequency. > > Can ...

Re: choosing the modulation technique

On Wed, 2 Apr 2008 06:16:03 -0700 (PDT), cb135@hotmail.com wrote: > > > I'll second Vladimir's input on the noise, and also that phase noise > > becomes very problematic at such low bit rates. So phase-modulated > > signals may not be the best choice for such low rates. > > > > ...

Re: Software PLL (SPLL)

Mark wrote: > A software PLL is based on an NCO and an NCO unlike a VCO has a minimum > step size so it can only achieve a number of discrete frequencies, i.e. > the output frequency is quantized. Why do you say this? An NCO is, of course based on some digital number representation; but...